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author | Alexandre Courbot <acourbot@nvidia.com> | 2025-07-18 16:26:21 +0900 |
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committer | Alexandre Courbot <acourbot@nvidia.com> | 2025-08-15 12:02:56 +0900 |
commit | e617f3a3702ca1ca2a498edbad0b12ceadc27321 (patch) | |
tree | b8f951c4f649d467f7e4f03200443e201ae9e756 /rust/kernel/alloc/allocator/iter.rs | |
parent | af10924fc471d1c693b8689249f53ea10b0519b7 (diff) |
gpu: nova-core: falcon: add distinct base address for PFALCON2
Falcon engines have two distinct register bases: `PFALCON` and
`PFALCON2`. So far we assumed that `PFALCON2` was located at `PFALCON +
0x1000` because that is the case of most engines, but there are
exceptions (NVDEC uses `0x1c00`).
Fix this shortcoming by leveraging the redesigned relative registers
definitions to assign a distinct `PFalcon2Base` base address to each
falcon engine.
Reviewed-by: Lyude Paul <lyude@redhat.com>
Link: https://lore.kernel.org/r/20250718-nova-regs-v2-16-7b6a762aa1cd@nvidia.com
Signed-off-by: Alexandre Courbot <acourbot@nvidia.com>
Diffstat (limited to 'rust/kernel/alloc/allocator/iter.rs')
0 files changed, 0 insertions, 0 deletions