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author | James Morse <james.morse@arm.com> | 2025-07-11 18:27:42 +0000 |
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committer | Greg Kroah-Hartman <gregkh@linuxfoundation.org> | 2025-07-16 15:04:27 +0200 |
commit | 9a697eff25c97dd11877de04fd1be60af32d6d2d (patch) | |
tree | 0ed62360c0abef0a7f51af215a116f22f567daaf /rust/kernel/workqueue.rs | |
parent | 6b585f4ce6e4cde967bffae4f6cd9066094967ac (diff) |
cacheinfo: Add arch hook to compress CPU h/w id into 32 bits for cache-id
Filesystems like resctrl use the cache-id exposed via sysfs to identify
groups of CPUs. The value is also used for PCIe cache steering tags. On
DT platforms cache-id is not something that is described in the
device-tree, but instead generated from the smallest CPU h/w id of the
CPUs associated with that cache.
CPU h/w ids may be larger than 32 bits.
Add a hook to allow architectures to compress the value from the devicetree
into 32 bits. Returning the same value is always safe as cache_of_set_id()
will stop if a value larger than 32 bits is seen.
For example, on arm64 the value is the MPIDR affinity register, which only
has 32 bits of affinity data, but spread accross the 64 bit field. An
arch-specific bit swizzle gives a 32 bit value.
Signed-off-by: James Morse <james.morse@arm.com>
Reviewed-by: Jonathan Cameron <jonathan.cameron@huawei.com>
Reviewed-by: Gavin Shan <gshan@redhat.com>
Link: https://lore.kernel.org/r/20250711182743.30141-3-james.morse@arm.com
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Diffstat (limited to 'rust/kernel/workqueue.rs')
0 files changed, 0 insertions, 0 deletions