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| author | Tom Fitzhenry <tom@tom-fitzhenry.me.uk> | 2022-10-02 20:28:09 +1100 |
|---|---|---|
| committer | Heiko Stuebner <heiko@sntech.de> | 2022-10-17 14:02:36 +0200 |
| commit | a7e6dbd6ac034480d7fde95ecf2259d27e5655b1 (patch) | |
| tree | 9fa8ce5ef09aa24b7a2f90f501c352e6a6b92ea0 /scripts/gdb/linux/cpus.py | |
| parent | 0522cd8112204d124d714eee7e9f0cac6de999d9 (diff) | |
arm64: dts: rockchip: add BT/wifi nodes to Pinephone Pro
Pinephone Pro includes a AzureWave AW-CM256SM wifi (sdio0) and
bt (uart0) combo module, which is based on Cypress
CYP43455 (BCM43455).
The CYP43455 datasheet ("Power-Up Sequence and Timing") documents:
* needing to wait 10ms between consecutive WL_REG_ON toggles
* needing to wait 110ms between power-on and SDIO access.
Signed-off-by: Tom Fitzhenry <tom@tom-fitzhenry.me.uk>
Reviewed-by: Ondřej Jirman <megi@xff.cz>
Link: https://lore.kernel.org/r/20221002092809.451501-1-tom@tom-fitzhenry.me.uk
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Diffstat (limited to 'scripts/gdb/linux/cpus.py')
0 files changed, 0 insertions, 0 deletions