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| author | Karl Palsson <karlp@tweak.net.au> | 2019-10-31 23:11:02 +0000 |
|---|---|---|
| committer | Maxime Ripard <maxime@cerno.tech> | 2019-11-01 10:04:52 +0100 |
| commit | 6d1aa40e109b6a30ce0ffa2dc56afc6442104986 (patch) | |
| tree | d3f0ee7cba2c77f2c82389e92ac604b8fa2d60eb /scripts/gdb/linux/modules.py | |
| parent | edabfce623fb1aceb8f4a2e0c53f9256b979223d (diff) | |
ARM: dts: sunxi: h3/h5: add missing uart2 rts/cts pins
uart1 and uart3 had existing pin definitions for the rts/cts pairs.
Add definitions for uart2 as well.
Signed-off-by: Karl Palsson <karlp@tweak.net.au>
Acked-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime@cerno.tech>
Diffstat (limited to 'scripts/gdb/linux/modules.py')
0 files changed, 0 insertions, 0 deletions