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| author | Mark Brown <broonie@kernel.org> | 2025-11-14 16:15:36 +0000 |
|---|---|---|
| committer | Mark Brown <broonie@kernel.org> | 2025-11-14 16:15:36 +0000 |
| commit | c94f134729491ab60fc68fcd919821014334db97 (patch) | |
| tree | 6549051e5f0ece3425a0698de018df8ff33c21c0 /scripts/gdb/linux/modules.py | |
| parent | af330925a18ff483adace1c4ed2dcc975a31d5c0 (diff) | |
| parent | 059f545832be85d29ac9ccc416a16f647aa78485 (diff) | |
Add support for Microchip CoreSPI Controller
Merge series from Prajna Rajendra Kumar <prajna.rajendrakumar@microchip.com>:
This patch series adds support for the Microchip FPGA CoreSPI "soft" IP
and documents its device tree bindings.
As preparation, the existing Microchip SPI driver is renamed to clearly
indicate that it supports only the Microchip PolarFire SoC "hard" controller.
Although it was originally named with the expectation that it might also
cover the FPGA CoreSPI "soft" IP, the register layouts differ significantly,
so separate drivers are required.
Diffstat (limited to 'scripts/gdb/linux/modules.py')
0 files changed, 0 insertions, 0 deletions
