diff options
| author | Ryan Wanner <Ryan.Wanner@microchip.com> | 2025-06-17 09:08:41 -0700 |
|---|---|---|
| committer | Claudiu Beznea <claudiu.beznea@tuxon.dev> | 2025-06-22 16:58:15 +0300 |
| commit | 0029468132ba2e00a3010865038783d9b2e6cc07 (patch) | |
| tree | 758118bb99425f068d18bfa6797ebcbc4181b9e5 /scripts/gdb/linux/proc.py | |
| parent | 47b77557d3beb748c505ffd4cc378725f7c495c5 (diff) | |
ARM: dts: microchip: sama7d65: Add clock name property
Add clock-output-names to the xtal nodes, so the driver can correctly
register the main and slow xtal.
This fixes the issue of the SoC clock driver not being able to find
the main xtal and slow xtal correctly causing a bad clock tree.
Fixes: 261dcfad1b59 ("ARM: dts: microchip: add sama7d65 SoC DT")
Signed-off-by: Ryan Wanner <Ryan.Wanner@microchip.com>
Link: https://lore.kernel.org/r/3878ae6d0016d46f0c91bd379146d575d5d336aa.1750175453.git.Ryan.Wanner@microchip.com
Signed-off-by: Claudiu Beznea <claudiu.beznea@tuxon.dev>
Diffstat (limited to 'scripts/gdb/linux/proc.py')
0 files changed, 0 insertions, 0 deletions