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authorDan Nowlin <dan.nowlin@intel.com>2020-02-13 13:31:17 -0800
committerJeff Kirsher <jeffrey.t.kirsher@intel.com>2020-02-19 12:59:37 -0800
commita6892c96fc4908f43b6bfbc0a72f416500254f76 (patch)
tree5827ca6be945b6368b10e8d2bc52d9e27fbf5282 /scripts/gdb/linux/proc.py
parent9d5c5a5290d4d7ae65dcd05e7b986fde4c679ff0 (diff)
ice: Fix for TCAM entry management
Order intermediate VSIG list correct in order to correctly match existing VSIG lists. When overriding pre-existing TCAM entries, properly delete the existing entry and remove it from the change/update list. Signed-off-by: Dan Nowlin <dan.nowlin@intel.com> Tested-by: Andrew Bowers <andrewx.bowers@intel.com> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
Diffstat (limited to 'scripts/gdb/linux/proc.py')
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