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| author | Sergio Paracuellos <sergio.paracuellos@gmail.com> | 2021-06-14 12:06:15 +0200 |
|---|---|---|
| committer | Greg Kroah-Hartman <gregkh@linuxfoundation.org> | 2021-06-15 15:24:29 +0200 |
| commit | 222b27713d7f7e189cca30ccdcee8e1f953d2c9f (patch) | |
| tree | 9253cf00046a44c977d711546ae23fb87d45378f /scripts/gdb/linux/timerlist.py | |
| parent | e0878ad49938cf74260b95fbe6026631b8e754f8 (diff) | |
MIPS: ralink: Define PCI_IOBASE
PCI_IOBASE is used to create VM maps for PCI I/O ports, it is
required by generic PCI drivers to make memory mapped I/O range
work. Hence define it for ralink architectures to be able to
avoid parsing manually IO ranges in PCI generic driver code.
Function 'plat_mem_setup' for ralink is using 'set_io_port_base'
call using '0xa0000000' as address, so use the same address in
the definition to align things.
Acked-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
Signed-off-by: Sergio Paracuellos <sergio.paracuellos@gmail.com>
Link: https://lore.kernel.org/r/20210614100617.28753-2-sergio.paracuellos@gmail.com
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Diffstat (limited to 'scripts/gdb/linux/timerlist.py')
0 files changed, 0 insertions, 0 deletions
