diff options
| author | Yao Zi <ziyao@disroot.org> | 2025-07-28 10:29:44 +0000 |
|---|---|---|
| committer | Vinod Koul <vkoul@kernel.org> | 2025-08-13 12:19:24 +0530 |
| commit | 43a9fade69799bd10e315e87cdc60a3f75b85414 (patch) | |
| tree | d628316a9c00255f7b36483053784921b1fc805b /scripts/gdb/linux/timerlist.py | |
| parent | 4ca28157bd52dfa6df665f8854d754cc03f45acf (diff) | |
dt-bindings: phy: rockchip: naneng-combphy: Add power-domains property
Though isn't described in existing devicetrees, most Rockchip combphys
belong to a specific power-domain of the SoC. Taking RK3588 as example,
combphy 0 and combphy 2 belong to the PD_BUS domain. Document the
power-domains property to allow describing the information correctly
in devicetree.
Signed-off-by: Yao Zi <ziyao@disroot.org>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20250728102947.38984-4-ziyao@disroot.org
Signed-off-by: Vinod Koul <vkoul@kernel.org>
Diffstat (limited to 'scripts/gdb/linux/timerlist.py')
0 files changed, 0 insertions, 0 deletions
