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authorPalmer Dabbelt <palmer@rivosinc.com>2025-03-26 15:54:12 -0700
committerPalmer Dabbelt <palmer@rivosinc.com>2025-03-26 15:54:12 -0700
commitdf02351331671abb26788bc13f6d276e26ae068f (patch)
tree4e1f8ee707cf6570f39feb47fc5bb151358ebd34 /scripts/generate_rust_analyzer.py
parent2014c95afecee3e76ca4a56956a936e23283f05b (diff)
parent74f4bf9d15ad1d6862b828d486ed10ea0e874a23 (diff)
Merge tag 'riscv-mw1-6.15-rc1' of ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/alexghiti/linux into for-next
riscv patches for 6.15-rc1 * A bunch of fixes: - We were missing a secondary mmu notifier call when flushing the tlb which is required for IOMMU - Fix ftrace panics by saving the registers as expected by ftrace - Fix a couple of stimecmp usage related to cpu hotplug - Fix a bunch of issues in the misaligned probing handling * Perf improvements: - Introduce support for runtime constant improving perf of d_hash() - Add support for huge pfnmaps to improve tlb utilization - Use Zawrs to improve smp_cond_load8/16() used by the queued spinlocks * Hwprobe additions: - Add support for Zicntr and Zihpm - Add support for Zaamo and Zalrsc - Add support for bfloat16 extensiosn - Add support for Zicbom (only enabling clean and flush, not inval for security reasons) * Misc: - Add a kernel parameter to bypass the misaligned speed probing since we can't rely on Zicclsm * tag 'riscv-mw1-6.15-rc1' of ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/alexghiti/linux: (1585 commits) riscv: Add runtime constant support riscv: Move nop definition to insn-def.h Documentation/kernel-parameters: Add riscv unaligned speed parameters riscv: Add parameter for skipping access speed tests riscv: Fix set up of vector cpu hotplug callback riscv: Fix set up of cpu hotplug callbacks riscv: Change check_unaligned_access_speed_all_cpus to void riscv: Fix check_unaligned_access_all_cpus riscv: Fix riscv_online_cpu_vec riscv: Annotate unaligned access init functions KVM: riscv: selftests: Add Zaamo/Zalrsc extensions to get-reg-list test RISC-V: KVM: Allow Zaamo/Zalrsc extensions for Guest/VM riscv: hwprobe: export Zaamo and Zalrsc extensions riscv: add parsing for Zaamo and Zalrsc extensions dt-bindings: riscv: add Zaamo and Zalrsc ISA extension description riscv: fgraph: Fix stack layout to match __arch_ftrace_regs argument of ftrace_return_to_handler riscv: fgraph: Select HAVE_FUNCTION_GRAPH_TRACER depends on HAVE_DYNAMIC_FTRACE_WITH_ARGS riscv: Fix missing __free_pages() in check_vector_unaligned_access() riscv: Fix the __riscv_copy_vec_words_unaligned implementation riscv: mm: Don't use %pK through printk ...
Diffstat (limited to 'scripts/generate_rust_analyzer.py')
-rwxr-xr-xscripts/generate_rust_analyzer.py71
1 files changed, 42 insertions, 29 deletions
diff --git a/scripts/generate_rust_analyzer.py b/scripts/generate_rust_analyzer.py
index aa8ea1a4dbe5..adae71544cbd 100755
--- a/scripts/generate_rust_analyzer.py
+++ b/scripts/generate_rust_analyzer.py
@@ -57,14 +57,26 @@ def generate_crates(srctree, objtree, sysroot_src, external_src, cfgs):
crates_indexes[display_name] = len(crates)
crates.append(crate)
- # First, the ones in `rust/` since they are a bit special.
- append_crate(
- "core",
- sysroot_src / "core" / "src" / "lib.rs",
- [],
- cfg=crates_cfgs.get("core", []),
- is_workspace_member=False,
- )
+ def append_sysroot_crate(
+ display_name,
+ deps,
+ cfg=[],
+ ):
+ append_crate(
+ display_name,
+ sysroot_src / display_name / "src" / "lib.rs",
+ deps,
+ cfg,
+ is_workspace_member=False,
+ )
+
+ # NB: sysroot crates reexport items from one another so setting up our transitive dependencies
+ # here is important for ensuring that rust-analyzer can resolve symbols. The sources of truth
+ # for this dependency graph are `(sysroot_src / crate / "Cargo.toml" for crate in crates)`.
+ append_sysroot_crate("core", [], cfg=crates_cfgs.get("core", []))
+ append_sysroot_crate("alloc", ["core"])
+ append_sysroot_crate("std", ["alloc", "core"])
+ append_sysroot_crate("proc_macro", ["core", "std"])
append_crate(
"compiler_builtins",
@@ -75,7 +87,7 @@ def generate_crates(srctree, objtree, sysroot_src, external_src, cfgs):
append_crate(
"macros",
srctree / "rust" / "macros" / "lib.rs",
- [],
+ ["std", "proc_macro"],
is_proc_macro=True,
)
@@ -85,27 +97,28 @@ def generate_crates(srctree, objtree, sysroot_src, external_src, cfgs):
["core", "compiler_builtins"],
)
- append_crate(
- "bindings",
- srctree / "rust"/ "bindings" / "lib.rs",
- ["core"],
- cfg=cfg,
- )
- crates[-1]["env"]["OBJTREE"] = str(objtree.resolve(True))
+ def append_crate_with_generated(
+ display_name,
+ deps,
+ ):
+ append_crate(
+ display_name,
+ srctree / "rust"/ display_name / "lib.rs",
+ deps,
+ cfg=cfg,
+ )
+ crates[-1]["env"]["OBJTREE"] = str(objtree.resolve(True))
+ crates[-1]["source"] = {
+ "include_dirs": [
+ str(srctree / "rust" / display_name),
+ str(objtree / "rust")
+ ],
+ "exclude_dirs": [],
+ }
- append_crate(
- "kernel",
- srctree / "rust" / "kernel" / "lib.rs",
- ["core", "macros", "build_error", "bindings"],
- cfg=cfg,
- )
- crates[-1]["source"] = {
- "include_dirs": [
- str(srctree / "rust" / "kernel"),
- str(objtree / "rust")
- ],
- "exclude_dirs": [],
- }
+ append_crate_with_generated("bindings", ["core"])
+ append_crate_with_generated("uapi", ["core"])
+ append_crate_with_generated("kernel", ["core", "macros", "build_error", "bindings", "uapi"])
def is_root_crate(build_file, target):
try: