diff options
| author | Rohan G Thomas <rohan.g.thomas@intel.com> | 2023-12-01 13:52:50 +0800 |
|---|---|---|
| committer | Jakub Kicinski <kuba@kernel.org> | 2023-12-04 18:37:39 -0800 |
| commit | 58f3240b3b93f880cae759ec2ff6ccfbf11903b7 (patch) | |
| tree | fe0b2449400775a7c12f0f384d69fbd9637c22df /scripts/generate_rust_target.rs | |
| parent | be5fc78a0084472dcc392cbea75f86202467437c (diff) | |
net: stmmac: xgmac: EST interrupts handling
Enabled the following EST related interrupts:
1) Constant Gate Control Error (CGCE)
2) Head-of-Line Blocking due to Scheduling (HLBS)
3) Head-of-Line Blocking due to Frame Size (HLBF)
4) Base Time Register error (BTRE)
5) Switch to S/W owned list Complete (SWLC)
Also, add EST errors into the ethtool statistic.
The commit e49aa315cb01 ("net: stmmac: EST interrupts handling and
error reporting") and commit 9f298959191b ("net: stmmac: Add EST
errors into ethtool statistic") add EST interrupts handling and error
reporting support to DWMAC4 core. This patch enables the same support
for XGMAC.
Signed-off-by: Rohan G Thomas <rohan.g.thomas@intel.com>
Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Link: https://lore.kernel.org/r/20231201055252.1302-2-rohan.g.thomas@intel.com
Signed-off-by: Jakub Kicinski <kuba@kernel.org>
Diffstat (limited to 'scripts/generate_rust_target.rs')
0 files changed, 0 insertions, 0 deletions
