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authorLad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>2025-05-09 17:01:21 +0100
committerGeert Uytterhoeven <geert+renesas@glider.be>2025-06-10 10:20:45 +0200
commit598b2a06702c12916d97640dbfb09bfdbf002c5c (patch)
treea65c2ed0045d115b036a5e45b52dafd8a00332c5 /scripts/lib/abi
parent899e7ede4c19c6778873ddeca312509fa5778f2c (diff)
clk: renesas: r9a09g057: Add clock and reset entries for GBETH0/1
Add clock and reset entries for GBETH instances. Include core clocks for PTP, sourced from PLLETH, and add PLLs, dividers, and static mux clocks used as clock sources for the GBETH IP. Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Link: https://lore.kernel.org/20250509160121.331073-3-prabhakar.mahadev-lad.rj@bp.renesas.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
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