diff options
author | Manikandan Muralidharan <manikandan.m@microchip.com> | 2025-07-30 15:40:15 +0530 |
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committer | Mark Brown <broonie@kernel.org> | 2025-08-10 21:11:42 +0100 |
commit | 91e5722baaea06c1f1b105e9e3fd6645dbdd938b (patch) | |
tree | f6f69720bb4ae07ab66e1101ccd8138448cb48e6 /scripts/make_fit.py | |
parent | a673ebd0a2a587f3d6b923d59d363fc9e8a9f920 (diff) |
spi: atmel: Add support for handling GCLK as a clock source
The SPI peripheral clock is typically used to derive the serial
clock (SPCK) via the FLEX_SPI_CSRx.SCBR field. However, on platforms
like the SAM9X7 SoC, where the peripheral clock can reach up to 266 MHz,
this may exceed the SCBR limit, causing SPI transfers to fail.
This patch adds support for using the SPI Generic Clock (GCLK) as an
alternative and more flexible clock source for SPCK generation.
The FLEX_SPI_MR.BRSRCCLK bit is updated accordingly to select between the
peripheral clock and GCLK.
Signed-off-by: Manikandan Muralidharan <manikandan.m@microchip.com>
Link: https://patch.msgid.link/20250730101015.323964-3-manikandan.m@microchip.com
Signed-off-by: Mark Brown <broonie@kernel.org>
Diffstat (limited to 'scripts/make_fit.py')
0 files changed, 0 insertions, 0 deletions