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| author | Andy Shevchenko <andriy.shevchenko@linux.intel.com> | 2025-02-04 19:01:00 +0200 |
|---|---|---|
| committer | Andy Shevchenko <andriy.shevchenko@linux.intel.com> | 2025-02-05 09:59:13 +0200 |
| commit | a1e062ab4a1f19bb0e94093ef90ab9a74f1f7744 (patch) | |
| tree | 7c7e8017aa2a370c8048ecc47c3fca05901ef0bc /tools/docs/lib/parse_data_structs.py | |
| parent | 112f5e0917cff2af35ada29e7db0b4d05bca7941 (diff) | |
MAINTAINERS: Add pin control and GPIO to the Intel MID record
Intel MID record is not listed all related files. Add to there
pin control and GPIO drivers along with HSU (High Speed UART)
and HSU DMA.
Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com>
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Diffstat (limited to 'tools/docs/lib/parse_data_structs.py')
0 files changed, 0 insertions, 0 deletions