diff options
| author | Anup Patel <apatel@ventanamicro.com> | 2025-10-17 21:30:05 -0600 |
|---|---|---|
| committer | Paul Walmsley <pjw@kernel.org> | 2025-10-17 21:30:05 -0600 |
| commit | ca525d53f994d45c8140968b571372c45f555ac1 (patch) | |
| tree | 89d46b3b21e7af9f714ceb6e274b5fa35297752b /tools/docs/parse-headers.py | |
| parent | fe69107ec7d8b946ab413cfe118984dac8f1a0d8 (diff) | |
RISC-V: Define pgprot_dmacoherent() for non-coherent devices
The pgprot_dmacoherent() is used when allocating memory for
non-coherent devices and by default pgprot_dmacoherent() is
same as pgprot_noncached() unless architecture overrides it.
Currently, there is no pgprot_dmacoherent() definition for
RISC-V hence non-coherent device memory is being mapped as
IO thereby making CPU access to such memory slow.
Define pgprot_dmacoherent() to be same as pgprot_writecombine()
for RISC-V so that CPU access non-coherent device memory as
NOCACHE which is better than accessing it as IO.
Fixes: ff689fd21cb1 ("riscv: add RISC-V Svpbmt extension support")
Signed-off-by: Anup Patel <apatel@ventanamicro.com>
Tested-by: Han Gao <rabenda.cn@gmail.com>
Tested-by: Guo Ren (Alibaba DAMO Academy) <guoren@kernel.org>
Link: https://lore.kernel.org/r/20250820152316.1012757-1-apatel@ventanamicro.com
Signed-off-by: Paul Walmsley <pjw@kernel.org>
Diffstat (limited to 'tools/docs/parse-headers.py')
0 files changed, 0 insertions, 0 deletions
