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authorGrzegorz Nitka <grzegorz.nitka@intel.com>2025-02-21 10:39:49 +0100
committerTony Nguyen <anthony.l.nguyen@intel.com>2025-10-28 12:49:59 -0700
commite9840461317e1bf0628b164de54632754d5f6a44 (patch)
treeafd86d84fc9b70504b4497b074e945fce431910c /tools/docs/parse-headers.py
parent210b35d6a7ea415494ce75490c4b43b4e717d935 (diff)
ice: fix lane number calculation
E82X adapters do not have sequential IDs, lane number is PF ID. Add check for ICE_MAC_GENERIC and skip checking port options. Also, adjust logical port number for specific E825 device with external PHY support (PCI device id 0x579F). For this particular device, with 2x25G (PHY0) and 2x10G (PHY1) port configuration, modification of pf_id -> lane_number mapping is required. PF IDs on the 2nd PHY start from 4 in such scenario. Otherwise, the lane number cannot be determined correctly, leading to PTP init errors during PF initialization. Fixes: 258f5f9058159 ("ice: Add correct PHY lane assignment") Co-developed-by: Karol Kolacinski <karol.kolacinski@intel.com> Signed-off-by: Karol Kolacinski <karol.kolacinski@intel.com> Signed-off-by: Grzegorz Nitka <grzegorz.nitka@intel.com> Reviewed-by: Przemek Kitszel <przemyslaw.kitszel@intel.com> Reviewed-by: Milena Olech <milena.olech@intel.com> Reviewed-by: Simon Horman <horms@kernel.org> Tested-by: Rinitha S <sx.rinitha@intel.com> (A Contingent worker at Intel) Signed-off-by: Tony Nguyen <anthony.l.nguyen@intel.com>
Diffstat (limited to 'tools/docs/parse-headers.py')
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