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| author | Krishna Chaitanya Chundru <krishna.chundru@oss.qualcomm.com> | 2025-10-17 17:10:54 +0530 |
|---|---|---|
| committer | Bjorn Helgaas <bhelgaas@google.com> | 2025-10-20 10:31:54 -0500 |
| commit | fc2bc2623e3a099165b02d13567d21fabb5ea54d (patch) | |
| tree | 380e2336a97a746cd7fd5278a0dcd63ac47a275d /tools/docs/parse-headers.py | |
| parent | a1978b692a3953241842a89eaa0026158f306cf1 (diff) | |
Revert "PCI: qcom: Prepare for the DWC ECAM enablement"
This reverts commit 4660e50cf81800f82eeecf743ad1e3e97ab72190.
Commit f6fd357f7afb ("PCI: dwc: Prepare the driver for enabling ECAM
mechanism using iATU 'CFG Shift Feature'") enabled ECAM access by using
the config space start as DBI address.
However, this approach breaks vendor drivers that rely on the DBI address
for internal accesses, especially when the vendor config space is 256MB
aligned.
To resolve this, avoid using the DBI as the start of config space and
instead introduce a custom ECAM PCI ops implementation.
Revert the qcom specific ECAM preparation logic in 4660e50cf818 ("PCI:
qcom: Prepare for the DWC ECAM enablement") since it's no longer necessary.
Signed-off-by: Krishna Chaitanya Chundru <krishna.chundru@oss.qualcomm.com>
[bhelgaas: commit log]
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Link: https://patch.msgid.link/20251017-ecam_fix-v1-2-f6faa3d0edf3@oss.qualcomm.com
Diffstat (limited to 'tools/docs/parse-headers.py')
0 files changed, 0 insertions, 0 deletions
