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| author | Huacai Chen <chenhuacai@loongson.cn> | 2025-12-06 10:40:32 +0800 |
|---|---|---|
| committer | Huacai Chen <chenhuacai@loongson.cn> | 2025-12-06 10:40:32 +0800 |
| commit | 81f5d15c48c441a2dadd3c4132fb80d8404fe7af (patch) | |
| tree | 6124265a076417421b3208ad8c8102f3f2f38a51 /tools/lib/python/kdoc/kdoc_re.py | |
| parent | 79974cc3ba45f3884e9c18da92a62b198a18ca62 (diff) | |
LoongArch: Add adaptive CSR accessors for 32BIT/64BIT
32BIT platforms only have 32bit CSR/IOCSR registers, 64BIT platforms
have both 32bit/64bit CSR/IOCSR registers. Now there are both 32bit and
64bit CSR accessors:
csr_read32()/csr_write32()/csr_xchg32();
csr_read64()/csr_write64()/csr_xchg64();
Some CSR registers (address and timer registers) are 32bit length on
32BIT platform and 64bit length on 64BIT platform. To avoid #ifdefs here
and there, they need adaptive accessors, so we define and use:
csr_read()/csr_write()/csr_xchg();
IOCSR doesn't have a "natural length", which means a 64bit register can
be treated as two 32bit registers, so we just use two 32bit accessors to
emulate a 64bit accessors.
Reviewed-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Jiaxun Yang <jiaxun.yang@flygoat.com>
Signed-off-by: Huacai Chen <chenhuacai@loongson.cn>
Diffstat (limited to 'tools/lib/python/kdoc/kdoc_re.py')
0 files changed, 0 insertions, 0 deletions
