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| author | Gustavo Sousa <gustavo.sousa@intel.com> | 2025-11-05 11:07:04 -0300 |
|---|---|---|
| committer | Gustavo Sousa <gustavo.sousa@intel.com> | 2025-11-06 18:23:18 -0300 |
| commit | 9b286c3b0bc0e0f242b2495ccb1b3523d50be484 (patch) | |
| tree | b04f569b20d7ea60981c8fbafd615877d999b4d5 /tools/lib/python/kdoc/python_version.py | |
| parent | 979c7cbd6c6cd3d8061bb69c32832a4c847e0ee6 (diff) | |
drm/i915/dram: Add field ecc_impacting_de_bw
Starting with Xe3p_LPD, we now have a new field in MEM_SS_INFO_GLOBAL
that indicates whether the memory has enabled ECC that limits display
bandwidth. Add the field ecc_impacting_de_bw to struct dram_info to
contain that information and set it appropriately when probing for
memory info.
Currently there are no instructions in Bspec on how to handle that case,
so let's throw a warning if we ever find such a scenario.
v2:
- s/ecc_impacting_de/ecc_impacting_de_bw/ to be more specific. (Matt
Atwood)
- Add warning if ecc_impacting_de_bw is true, since we currently do
not have instructions on how to handle it. (Matt Roper)
v3:
- Check on ecc_impacting_de_bw for the warning only for Xe3p_LPD and
beyond.
- Change warning macro from drm_WARN_ON_ONCE() to drm_WARN_ON().
Bspec: 69131
Cc: Jani Nikula <jani.nikula@linux.intel.com>
Cc: Matt Atwood <matthew.s.atwood@intel.com>
Reviewed-by: Matt Roper <matthew.d.roper@intel.com>
Link: https://patch.msgid.link/20251103-xe3p_lpd-basic-enabling-v3-15-00e87b510ae7@intel.com
Signed-off-by: Gustavo Sousa <gustavo.sousa@intel.com>
Diffstat (limited to 'tools/lib/python/kdoc/python_version.py')
0 files changed, 0 insertions, 0 deletions
