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| author | Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> | 2025-06-17 16:57:57 +0100 |
|---|---|---|
| committer | Geert Uytterhoeven <geert+renesas@glider.be> | 2025-06-19 20:19:19 +0200 |
| commit | 8b8ca279752e0c9ae242a110ecb513dd85e5844f (patch) | |
| tree | 7d0c652e2efcce801045afd625999394741ab654 /tools/perf/scripts/python/arm-cs-trace-disasm.py | |
| parent | 5701451e849bd3fe60d071fa80d39697c6f39a48 (diff) | |
clk: renesas: Add CPG/MSSR support to RZ/N2H SoC
Add clock driver support for the Renesas RZ/N2H (R9A09G087) SoC by reusing
the existing RZ/T2H (R9A09G077) CPG/MSSR implementation, as both SoCs
share the same clock and reset architecture.
Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/20250617155757.149597-5-prabhakar.mahadev-lad.rj@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Diffstat (limited to 'tools/perf/scripts/python/arm-cs-trace-disasm.py')
0 files changed, 0 insertions, 0 deletions