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| author | Claudiu Beznea <claudiu.beznea.uj@bp.renesas.com> | 2025-05-27 14:24:00 +0300 |
|---|---|---|
| committer | Geert Uytterhoeven <geert+renesas@glider.be> | 2025-06-10 10:24:17 +0200 |
| commit | c4969595274609055c71cbe831c2989361730876 (patch) | |
| tree | 8a90add88be9cc440d430618e5ba2fdd5ddbf0aa /tools/perf/scripts/python/arm-cs-trace-disasm.py | |
| parent | 5cd33db5695693c3b4b9d5fc5e2be70c3efa99dd (diff) | |
clk: renesas: r9a08g045: Drop power domain instantiation
Since the configuration order between the individual MSTOP and CLKON
bits cannot be preserved with the power domain abstraction, drop the
power domain instantiations.
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Claudiu Beznea <claudiu.beznea.uj@bp.renesas.com>
Link: https://lore.kernel.org/20250527112403.1254122-6-claudiu.beznea.uj@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Diffstat (limited to 'tools/perf/scripts/python/arm-cs-trace-disasm.py')
0 files changed, 0 insertions, 0 deletions