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| author | Ankit Nautiyal <ankit.k.nautiyal@intel.com> | 2025-01-22 21:58:50 +0530 |
|---|---|---|
| committer | Ankit Nautiyal <ankit.k.nautiyal@intel.com> | 2025-01-23 09:57:26 +0530 |
| commit | 18176f56942a596c5d03ed69ef30ad72f67a7edc (patch) | |
| tree | 1730d049d1eb2814cc8ffb5d99715eb2ad930685 /tools/perf/scripts/python/bin/stackcollapse-report | |
| parent | 560de03d15c06a3c17b20733a5b200ac0f78ae40 (diff) | |
drm/i915/cx0_phy_regs: Add C10 registers bits
Add C10 register bits to be used for computing HDMI PLLs with
algorithm.
v2: Add bspec reference. (Suraj)
v3: Use REG_BIT8 like other reg bits/masks. (Jani)
Bspec: 74166
Signed-off-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com>
Reviewed-by: Suraj Kandpal <suraj.kandpal@intel.com>
Acked-by: Jani Nikula <jani.nikula@intel.com>
Tested-by: Khaled Almahallawy <khaled.almahallawy@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20250122162850.1861410-1-ankit.k.nautiyal@intel.com
Diffstat (limited to 'tools/perf/scripts/python/bin/stackcollapse-report')
0 files changed, 0 insertions, 0 deletions