diff options
| author | Nitin Rawat <quic_nitirawa@quicinc.com> | 2023-09-05 10:53:56 +0530 |
|---|---|---|
| committer | Martin K. Petersen <martin.petersen@oracle.com> | 2023-09-13 21:15:40 -0400 |
| commit | 07d2290fe80dc9b1b0d066dc2027b84770144e49 (patch) | |
| tree | 6f3e9b364aef10fb7b8882dd995ae0c2ee97c486 /tools/perf/scripts/python/export-to-postgresql.py | |
| parent | 0bb80ecc33a8fb5a682236443c1e740d5c917d1d (diff) | |
scsi: ufs: qcom: Update MAX_CORE_CLK_1US_CYCLES for UFS V4 and above
UFS Controller V4 and above, the register layout for DME_VS_CORE_CLK_CTRL
register has changed. MAX_CORE_CLK_1US_CYCLES offset has changed from 0 to
0x10 and length of attrbute is changed from 8bit to 12bit.
Add support to configure MAX_CORE_CLK_1US_CYCLES for UFS V4 and above as
per new register layout.
Co-developed-by: Naveen Kumar Goud Arepalli <quic_narepall@quicinc.com>
Signed-off-by: Naveen Kumar Goud Arepalli <quic_narepall@quicinc.com>
Signed-off-by: Nitin Rawat <quic_nitirawa@quicinc.com>
Link: https://lore.kernel.org/r/20230905052400.13935-2-quic_nitirawa@quicinc.com
Reviewed-by: Can Guo <quic_cang@quicinc.com>
Signed-off-by: Martin K. Petersen <martin.petersen@oracle.com>
Diffstat (limited to 'tools/perf/scripts/python/export-to-postgresql.py')
0 files changed, 0 insertions, 0 deletions