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| author | Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> | 2025-04-14 15:57:26 +0100 |
|---|---|---|
| committer | Vinod Koul <vkoul@kernel.org> | 2025-05-14 12:14:58 +0100 |
| commit | 31eebeef8cdd4c9bddc9d34053cab6553616d0b7 (patch) | |
| tree | a76ec7c7466122be56d0d98cfecdbf2a173b9b3d /tools/perf/scripts/python/export-to-sqlite.py | |
| parent | cc52a697f87e8b2d88298827aca3f81398385572 (diff) | |
dt-bindings: phy: renesas,usb2-phy: Add clock constraint for RZ/G2L family
The RZ/G2L family requires two clocks for USB2 PHY, which are already
defined in the DTSI files. Add a constraint in the DT binding document
to ensure validation with `dtbs_check`.
Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Acked-by: Rob Herring (Arm) <robh@kernel.org>
Link: https://lore.kernel.org/r/20250414145729.343133-2-prabhakar.mahadev-lad.rj@bp.renesas.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
Diffstat (limited to 'tools/perf/scripts/python/export-to-sqlite.py')
0 files changed, 0 insertions, 0 deletions