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| author | Kunihiko Hayashi <hayashi.kunihiko@socionext.com> | 2022-03-30 19:55:14 +0900 |
|---|---|---|
| committer | Vinod Koul <vkoul@kernel.org> | 2022-04-13 12:12:25 +0530 |
| commit | 45d1f841d5a4afb415415f9f87c9d4ce15e19f42 (patch) | |
| tree | b223a8a40d34ca3f674c6dcc33c82fb8e61ab739 /tools/perf/scripts/python/export-to-sqlite.py | |
| parent | fccd2f32deb1bef32915b2240dfd603633eef960 (diff) | |
dt-bindings: phy: uniphier-usb3hs: Fix incorrect clock-names and reset-names
There is no clock-names and reset-names for Pro5 SoC, that should have two
properties, "gio" and "link" like usb3-ssphy.
And according to the existing PXs2 devicetree, the clock-names for PXs2 SoC
should have "link" and "phy", and minItems of clocks should be 2.
Fixes: 134ab2845acb ("dt-bindings: phy: Convert UniPhier USB3-PHY conroller to json-schema")
Signed-off-by: Kunihiko Hayashi <hayashi.kunihiko@socionext.com>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/1648637715-19262-5-git-send-email-hayashi.kunihiko@socionext.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
Diffstat (limited to 'tools/perf/scripts/python/export-to-sqlite.py')
0 files changed, 0 insertions, 0 deletions