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| author | Gustavo Sousa <gustavo.sousa@intel.com> | 2025-02-03 17:58:58 -0300 |
|---|---|---|
| committer | Gustavo Sousa <gustavo.sousa@intel.com> | 2025-02-04 08:43:12 -0300 |
| commit | 71be802005074a4cc2297e4a1da1ca268d9c6b49 (patch) | |
| tree | 6297f589b4a775bf7cdf830bfbbac807d50c7d0f /tools/perf/scripts/python/mem-phys-addr.py | |
| parent | 67782bf6e8a6289996bbc3ce7138c30ff72ee458 (diff) | |
drm/i915/dmc_wl: Track INITIATE_PM_DMD_REQ for DC5
The Bspec has been updated to include INITIATE_PM_DMD_REQ in the set of
register offsets that require the DMC wakelock for access during DC5.
Update our table accordingly.
Bspec: 71583
Reviewed-by: Luca Coelho <luciano.coelho@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20250203205941.251754-1-gustavo.sousa@intel.com
Signed-off-by: Gustavo Sousa <gustavo.sousa@intel.com>
Diffstat (limited to 'tools/perf/scripts/python/mem-phys-addr.py')
0 files changed, 0 insertions, 0 deletions