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author | Quentin Schulz <quentin.schulz@cherry.de> | 2025-06-27 12:53:54 +0200 |
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committer | Lee Jones <lee@kernel.org> | 2025-07-24 11:27:17 +0100 |
commit | db8db85cff331eb5a520a18a606692ff85405c3d (patch) | |
tree | 4143cd37135cf70f663c0a1288f2175ce54d3b59 /tools/perf/scripts/python/netdev-times.py | |
parent | 404005d1083997daec7236620b9ba14bccdce449 (diff) |
mfd: rk8xx-core: Allow to customize RK806 reset mode
The RK806 PMIC has a bitfield for configuring the restart/reset behavior
(which I assume Rockchip calls "function") whenever the PMIC is reset
either programmatically (c.f. DEV_RST in the datasheet) or via PWRCTRL
or RESETB pins.
For RK806, the following values are possible for RST_FUN:
0b00 means "Restart PMU"
0b01 means "Reset all the power off reset registers, forcing
the state to switch to ACTIVE mode"
0b10 means "Reset all the power off reset registers, forcing
the state to switch to ACTIVE mode, and simultaneously
pull down the RESETB PIN for 5mS before releasing"
0b11 means the same as for 0b10 just above.
This adds the appropriate logic in the driver to parse the new
rockchip,reset-mode DT property to pass this information. It just
happens that the values in the binding match the values to write in the
bitfield so no mapping is necessary.
If it is missing, the register is left untouched and relies either on
the silicon default or on whatever was set earlier in the boot stages
(e.g. the bootloader).
Signed-off-by: Quentin Schulz <quentin.schulz@cherry.de>
Link: https://lore.kernel.org/r/20250627-rk8xx-rst-fun-v4-2-ce05d041b45f@cherry.de
Signed-off-by: Lee Jones <lee@kernel.org>
Diffstat (limited to 'tools/perf/scripts/python/netdev-times.py')
0 files changed, 0 insertions, 0 deletions