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| author | Fabrizio Castro <fabrizio.castro.jz@renesas.com> | 2025-06-24 20:22:59 +0100 |
|---|---|---|
| committer | Geert Uytterhoeven <geert+renesas@glider.be> | 2025-07-02 20:36:51 +0200 |
| commit | 6132643bfdc928696205207027bce81d23b7ce59 (patch) | |
| tree | dd328aad922a97a8b319456ee9a6511606dd25ce /tools/perf/scripts/python/stackcollapse.py | |
| parent | b7c26cbd5b704a350b3176669f47047153903bc9 (diff) | |
clk: renesas: r9a09g057: Add entries for the RSPIs
Add clock and reset entries for the Renesas RZ/V2H(P) RSPI IPs.
Signed-off-by: Fabrizio Castro <fabrizio.castro.jz@renesas.com>
Reviewed-by: Biju Das <biju.das.jz@bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/20250624192304.338979-2-fabrizio.castro.jz@renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Diffstat (limited to 'tools/perf/scripts/python/stackcollapse.py')
0 files changed, 0 insertions, 0 deletions