diff options
| author | José Roberto de Souza <jose.souza@intel.com> | 2018-06-26 13:16:41 -0700 |
|---|---|---|
| committer | Dhinakaran Pandiyan <dhinakaran.pandiyan@intel.com> | 2018-06-26 17:11:35 -0700 |
| commit | cc3054ff6214f6d14d35ffe629ff8d5032ace7f7 (patch) | |
| tree | bdde2cc24d694910e7727870bbadc32f6bdcfbcd /tools/perf/scripts/python/syscall-counts.py | |
| parent | 42f53ffcad7fcf11b5767767dd0c0ff607d99787 (diff) | |
drm/i915/psr: Begin to handle PSR/PSR2 errors set by sink
eDP spec states that sink device will do a short pulse in HPD
line when there is a PSR/PSR2 error that needs to be handled by
source, this is handling the first and most simples error:
DP_PSR_SINK_INTERNAL_ERROR.
Here taking the safest approach and disabling PSR(at least until
the next modeset), to avoid multiple rendering issues due to
bad pannels.
v5:
added lockdep_assert in psr_disable and renamed psr_disable()
to intel_psr_disable_locked()
v4:
Using CAN_PSR instead of HAS_PSR in intel_psr_short_pulse
v3:
disabling PSR instead of exiting on error
Reviewed-by: Dhinakaran Pandiyan <dhinakaran.pandiyan@intel.com>
Cc: Rodrigo Vivi <rodrigo.vivi@intel.com>
Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
Signed-off-by: Dhinakaran Pandiyan <dhinakaran.pandiyan@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20180626201644.21932-2-jose.souza@intel.com
Diffstat (limited to 'tools/perf/scripts/python/syscall-counts.py')
0 files changed, 0 insertions, 0 deletions
