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| author | Mitul Golani <mitulkumar.ajitkumar.golani@intel.com> | 2025-01-30 10:46:05 +0530 |
|---|---|---|
| committer | Ankit Nautiyal <ankit.k.nautiyal@intel.com> | 2025-01-30 19:44:37 +0530 |
| commit | 387f269e56eafa461a314a30b4e7f85625b2cba6 (patch) | |
| tree | 084b18ace6cb382c57b82805d00f5464afe825c8 /tools/perf/scripts/python/task-analyzer.py | |
| parent | 2dbbbc1740388a8bc4a8237de0b009eecec8f998 (diff) | |
drm/i915/vrr: Compute vrr.vsync_{start, end} during full modeset
vrr.vsync_{start,end} computation should not depend on
crtc_state->vrr.enable.
--v1:
- Explain commit message more clearly [Jani]
- Instead of tweaking to fastset use vrr.flipline while computing AS_SDP.
--v2:
- Correct computation of vrr.vsync_start/end should not depend on
vrr.enable.[ville]
- vrr enable disable requirement should not obstruct by SDP enable
disable requirements. [Ville]
--v3:
- Create separate patch for crtc_state_dump [Ankit].
--v4:
- Update commit message and header [Ankit].
Signed-off-by: Mitul Golani <mitulkumar.ajitkumar.golani@intel.com>
Reviewed-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com>
Signed-off-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20250130051609.1796524-3-mitulkumar.ajitkumar.golani@intel.com
Diffstat (limited to 'tools/perf/scripts/python/task-analyzer.py')
0 files changed, 0 insertions, 0 deletions