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| author | Nicolas Frattaroli <nicolas.frattaroli@collabora.com> | 2025-06-19 20:36:37 +0200 |
|---|---|---|
| committer | Heiko Stuebner <heiko@sntech.de> | 2025-06-19 23:46:59 +0200 |
| commit | 64df8e2e207a2152201ef3515baacd8816c13282 (patch) | |
| tree | 9ab81b247dc9504191bec98f25e278e6f35b0595 /tools/perf/scripts/python/task-analyzer.py | |
| parent | a8cdcbe6a9f64f56ee24c9e8325fb89cf41a5d63 (diff) | |
arm64: dts: rockchip: enable USB on Sige5
The ArmSoM Sige5 has several USB ports: a Type-A USB 3 port (USB2 lines
going through a hub), a Type-A USB 2.0 port (also going through a hub),
a Type-C DC input port that has absolutely no USB data connection and a
Type-C port with USB3.2 Gen1x1 that's also the maskrom programming port.
Enable these ports, and set the device role to be host for the host
ports.
The data capable Type-C USB port uses a fusb302 for data role switching.
Signed-off-by: Nicolas Frattaroli <nicolas.frattaroli@collabora.com>
Link: https://lore.kernel.org/r/20250619-rk3576-sige5-usb-v5-2-9069a7e750e1@collabora.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Diffstat (limited to 'tools/perf/scripts/python/task-analyzer.py')
0 files changed, 0 insertions, 0 deletions