summaryrefslogtreecommitdiff
path: root/tools/perf/util/scripting-engines/trace-event-python.c
diff options
context:
space:
mode:
authorStephen Boyd <sboyd@kernel.org>2025-07-21 10:26:31 -0700
committerStephen Boyd <sboyd@kernel.org>2025-07-21 10:26:31 -0700
commit0b4ff5bc7d75553e243de5e2baf867c9beb63bef (patch)
tree16bb52dcb1f2d5c53125e18d1955185f28ee53fe /tools/perf/util/scripting-engines/trace-event-python.c
parent19272b37aa4f83ca52bdf9c16d5d81bdd1354494 (diff)
parent80395c3b47577c12121d4e408e7b9478f7f88d02 (diff)
Merge tag 'sunxi-clk-for-6.17' of https://git.kernel.org/pub/scm/linux/kernel/git/sunxi/linux into clk-allwinner
Pull Allwinner clk driver updates from Chen-Yu Tsai: - Add Allwinner A523's missing PPU0 reset (both DT binding and driver) The binding change is shared with the soc tree. - Fix Allwinner V3s DE clock mux field width - Stop passing rate change requests to parent for Allwinner V3s DE clock - Force and lock Allwinner V3s DE and TCON clocks to the same parent, the video PLL * tag 'sunxi-clk-for-6.17' of https://git.kernel.org/pub/scm/linux/kernel/git/sunxi/linux: clk: sunxi-ng: ccu_nm: convert from round_rate() to determine_rate() clk: sunxi-ng: ccu_nkmp: convert from round_rate() to determine_rate() clk: sunxi-ng: ccu_nk: convert from round_rate() to determine_rate() clk: sunxi-ng: ccu_gate: convert from round_rate() to determine_rate() clk: sunxi-ng: v3s: Assign the de and tcon clocks to the video pll clk: sunxi-ng: v3s: Fix de clock definition clk: sunxi-ng: sun55i-a523-r-ccu: Add missing PPU0 reset dt-bindings: reset: sun55i-a523-r-ccu: Add missing PPU0 reset
Diffstat (limited to 'tools/perf/util/scripting-engines/trace-event-python.c')
0 files changed, 0 insertions, 0 deletions