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author | Sebastian Brzezinka <sebastian.brzezinka@intel.com> | 2025-08-11 09:12:31 +0000 |
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committer | Tvrtko Ursulin <tursulin@ursulin.net> | 2025-08-19 07:42:22 +0100 |
commit | 8236820fd767f400d1baefb71bc7e36e37730a1e (patch) | |
tree | 1d31f1074b5d3ede15abc40477cded73e2990742 /tools/perf/util/scripting-engines/trace-event-python.c | |
parent | ff646d033783068cc5b38924873cab4a536b17c1 (diff) |
drm/i915/gt: Relocate compression repacking WA for JSL/EHL
CACHE_MODE_0 registers should be saved and restored as part of
the context, not during engine reset. Move the related workaround
(Disable Repacking for Compression) from rcs_engine_wa_init()
to icl_ctx_workarounds_init() for Jasper Lake and Elkhart
Lake platforms. This ensures the WA is applied during context
initialisation.
BSPEC: 11322
Fixes: 0ddae025ab6c ("drm/i915: Disable compression tricks on JSL")
Closes: Fixes: 0ddae025ab6c ("drm/i915: Disable compression tricks on JSL")
Signed-off-by: Sebastian Brzezinka <sebastian.brzezinka@intel.com>
Cc: stable@vger.kernel.org # v6.13+
Reviewed-by: Andi Shyti <andi.shyti@linux.intel.com>
Reviewed-by: Krzysztof Karas <krzysztof.karas@intel.com>
Signed-off-by: Andi Shyti <andi.shyti@linux.intel.com>
Link: https://lore.kernel.org/r/4feaa24094e019e000ceb6011d8cd419b0361b3f.1754902406.git.sebastian.brzezinka@intel.com
(cherry picked from commit c9932f0d604e4c8f2c6018e598a322acb43c68a2)
Signed-off-by: Tvrtko Ursulin <tursulin@ursulin.net>
Diffstat (limited to 'tools/perf/util/scripting-engines/trace-event-python.c')
0 files changed, 0 insertions, 0 deletions