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authorBjorn Helgaas <bhelgaas@google.com>2025-07-31 16:12:16 -0500
committerBjorn Helgaas <bhelgaas@google.com>2025-07-31 16:12:16 -0500
commit90eb421c46fd7e31f03b4e5f8a36eb81ca3f42bb (patch)
tree00d551cc35283b364b1d859599d9b93b8a95e648 /tools/perf/util/scripting-engines/trace-event-python.c
parent81b3be6cc58a43c9272ca94c9c0f1ce38b3107cb (diff)
parent114b06ee108cabc82b995fbac6672230a9776936 (diff)
Merge branch 'pci/controller/rockchip'
- Drop unused PCIe Message routing and code definitions (Hans Zhang) - Use standard PCIe config register definitions instead of rockchip-specific redefinitions (Geraldo Nascimento) - Set Target Link Speed to 5.0 GT/s before retraining so we have a chance to train at a higher speed (Geraldo Nascimento) * pci/controller/rockchip: PCI: rockchip: Set Target Link Speed to 5.0 GT/s before retraining PCI: rockchip: Use standard PCIe definitions PCI: rockchip: Remove redundant PCIe message routing definitions
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