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authorNiklas Cassel <cassel@kernel.org>2025-06-25 12:23:49 +0200
committerManivannan Sadhasivam <mani@kernel.org>2025-06-25 07:25:16 -0600
commitc7eb9c5e1498882951b7583c56add0b77bfc162e (patch)
tree3bc576d059e5a2b191dc7d7ad12edb53ea3d4233 /tools/perf/util/scripting-engines/trace-event-python.c
parentbbc6a829ad3f054181d24a56944f944002e68898 (diff)
PCI: dw-rockchip: Wait PCIE_RESET_CONFIG_WAIT_MS after link-up IRQ
Per PCIe r6.0, sec 6.6.1, software must generally wait a minimum of 100ms (PCIE_RESET_CONFIG_WAIT_MS) after Link training completes before sending a Configuration Request. Prior to ec9fd499b9c6 ("PCI: dw-rockchip: Don't wait for link since we can detect Link Up"), dw-rockchip used dw_pcie_wait_for_link(), which waited between 0 and 90ms after the link came up before we enumerate the bus, and this was apparently enough for most devices. After ec9fd499b9c6, rockchip_pcie_rc_sys_irq_thread() started enumeration immediately when handling the link-up IRQ, and devices (e.g., Laszlo Fiat's PLEXTOR PX-256M8PeGN NVMe SSD) may not be ready to handle config requests yet. Delay PCIE_RESET_CONFIG_WAIT_MS after the link-up IRQ before starting enumeration. Fixes: 0e898eb8df4e ("PCI: rockchip-dwc: Add Rockchip RK356X host controller driver") Signed-off-by: Niklas Cassel <cassel@kernel.org> Signed-off-by: Manivannan Sadhasivam <mani@kernel.org> Reviewed-by: Damien Le Moal <dlemoal@kernel.org> Reviewed-by: Wilfred Mallawa <wilfred.mallawa@wdc.com> Cc: Laszlo Fiat <laszlo.fiat@proton.me> Link: https://patch.msgid.link/20250625102347.1205584-12-cassel@kernel.org
Diffstat (limited to 'tools/perf/util/scripting-engines/trace-event-python.c')
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