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| author | Leo Yan <leo.yan@arm.com> | 2025-07-31 13:23:45 +0100 |
|---|---|---|
| committer | Suzuki K Poulose <suzuki.poulose@arm.com> | 2025-09-23 14:14:13 +0100 |
| commit | 7b20a4fac7c82c0aed6beb22a8523df28361b1ad (patch) | |
| tree | abef8409ed80e4dcc57636a3f783a2c5b6cb4b2d /tools/testing/selftests/net/lib/py/utils.py | |
| parent | ba6b61fa21aa44a5634f2dbf78ee6817d3196fc4 (diff) | |
coresight: Make clock sequence consistent
Since atclk is enabled after pclk during the probe phase, this commit
maintains the same sequence for the runtime resume flow.
Reviewed-by: Anshuman Khandual <anshuman.khandual@arm.com>
Reviewed-by: Yeoreum Yun <yeoreum.yun@arm.com>
Tested-by: James Clark <james.clark@linaro.org>
Signed-off-by: Leo Yan <leo.yan@arm.com>
Signed-off-by: Suzuki K Poulose <suzuki.poulose@arm.com>
Link: https://lore.kernel.org/r/20250731-arm_cs_fix_clock_v4-v6-9-1dfe10bb3f6f@arm.com
Diffstat (limited to 'tools/testing/selftests/net/lib/py/utils.py')
0 files changed, 0 insertions, 0 deletions