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authorUwe Kleine-König <u.kleine-koenig@baylibre.com>2025-07-25 17:45:05 +0200
committerUwe Kleine-König <ukleinek@kernel.org>2025-09-15 11:39:44 +0200
commitc95ab56a7ad6e6ae2be93591287fd9b25027fe38 (patch)
tree4fb05a3c05bb9dfb998fd8b739c5aa1ab637cd20 /tools/testing/selftests/net/lib/py/utils.py
parenta2f77ae4778d1eef2d273683ccc09fa971111c8c (diff)
pwm: mediatek: Simplify representation of channel offsets
The general register layout contains some per-chip registers starting at offset 0 and then at a higher address there are n nearly identical and equidistant blocks for the registers of the n channels. This allows to represent the offsets of per-channel registers as $base + i * $width instead of listing all (or too many) offsets explicitly in an array. So for a small additional effort in pwm_mediatek_writel() the three arrays with the channel offsets can be dropped. The size changes according to bloat-o-meter are: add/remove: 0/3 grow/shrink: 1/0 up/down: 12/-96 (-84) Function old new delta pwm_mediatek_apply 696 708 +12 mtk_pwm_reg_offset_v3 32 - -32 mtk_pwm_reg_offset_v2 32 - -32 mtk_pwm_reg_offset_v1 32 - -32 Total: Before=5347, After=5263, chg -1.57% Signed-off-by: Uwe Kleine-König <u.kleine-koenig@baylibre.com> Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Link: https://lore.kernel.org/r/20250725154506.2610172-11-u.kleine-koenig@baylibre.com Signed-off-by: Uwe Kleine-König <ukleinek@kernel.org>
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