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-rw-r--r--arch/arm64/boot/dts/rockchip/rk3528.dtsi30
1 files changed, 27 insertions, 3 deletions
diff --git a/arch/arm64/boot/dts/rockchip/rk3528.dtsi b/arch/arm64/boot/dts/rockchip/rk3528.dtsi
index 58c8977249be..db5dbcac7756 100644
--- a/arch/arm64/boot/dts/rockchip/rk3528.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3528.dtsi
@@ -155,6 +155,7 @@
gpio-ranges = <&pinctrl 0 32 32>;
interrupt-controller;
#interrupt-cells = <2>;
+ power-domains = <&power RK3528_PD_VPU>;
};
gpio2: gpio@ffb00000 {
@@ -167,6 +168,7 @@
gpio-ranges = <&pinctrl 0 64 32>;
interrupt-controller;
#interrupt-cells = <2>;
+ power-domains = <&power RK3528_PD_VO>;
};
gpio3: gpio@ffb10000 {
@@ -179,6 +181,7 @@
gpio-ranges = <&pinctrl 0 96 32>;
interrupt-controller;
#interrupt-cells = <2>;
+ power-domains = <&power RK3528_PD_VPU>;
};
gpio4: gpio@ffb20000 {
@@ -191,6 +194,7 @@
gpio-ranges = <&pinctrl 0 128 32>;
interrupt-controller;
#interrupt-cells = <2>;
+ power-domains = <&power RK3528_PD_RKVENC>;
};
};
@@ -506,7 +510,6 @@
reg = <RK3528_PD_RKVENC>;
pm_qos = <&qos_rkvenc>;
#power-domain-cells = <0>;
- status = "disabled";
};
power-domain@RK3528_PD_VO {
reg = <RK3528_PD_VO>;
@@ -520,7 +523,6 @@
<&qos_vdpp>,
<&qos_vop>;
#power-domain-cells = <0>;
- status = "disabled";
};
power-domain@RK3528_PD_VPU {
reg = <RK3528_PD_VPU>;
@@ -534,7 +536,6 @@
<&qos_usb3otg>,
<&qos_vpu>;
#power-domain-cells = <0>;
- status = "disabled";
};
};
};
@@ -576,6 +577,7 @@
interrupts = <GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH>;
dmas = <&dmac 25>, <&dmac 24>;
dma-names = "tx", "rx";
+ power-domains = <&power RK3528_PD_RKVENC>;
#address-cells = <1>;
#size-cells = <0>;
status = "disabled";
@@ -590,6 +592,7 @@
interrupts = <GIC_SPI 132 IRQ_TYPE_LEVEL_HIGH>;
dmas = <&dmac 31>, <&dmac 30>;
dma-names = "tx", "rx";
+ power-domains = <&power RK3528_PD_VPU>;
#address-cells = <1>;
#size-cells = <0>;
status = "disabled";
@@ -614,6 +617,7 @@
clock-names = "baudclk", "apb_pclk";
interrupts = <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>;
dmas = <&dmac 11>, <&dmac 10>;
+ power-domains = <&power RK3528_PD_RKVENC>;
reg-io-width = <4>;
reg-shift = <2>;
status = "disabled";
@@ -626,6 +630,7 @@
clock-names = "baudclk", "apb_pclk";
interrupts = <GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>;
dmas = <&dmac 13>, <&dmac 12>;
+ power-domains = <&power RK3528_PD_VPU>;
reg-io-width = <4>;
reg-shift = <2>;
status = "disabled";
@@ -638,6 +643,7 @@
clock-names = "baudclk", "apb_pclk";
interrupts = <GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>;
dmas = <&dmac 15>, <&dmac 14>;
+ power-domains = <&power RK3528_PD_RKVENC>;
reg-io-width = <4>;
reg-shift = <2>;
status = "disabled";
@@ -650,6 +656,7 @@
clock-names = "baudclk", "apb_pclk";
interrupts = <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>;
dmas = <&dmac 17>, <&dmac 16>;
+ power-domains = <&power RK3528_PD_VO>;
reg-io-width = <4>;
reg-shift = <2>;
status = "disabled";
@@ -662,6 +669,7 @@
clock-names = "baudclk", "apb_pclk";
interrupts = <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>;
dmas = <&dmac 19>, <&dmac 18>;
+ power-domains = <&power RK3528_PD_VPU>;
reg-io-width = <4>;
reg-shift = <2>;
status = "disabled";
@@ -674,6 +682,7 @@
clock-names = "baudclk", "apb_pclk";
interrupts = <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>;
dmas = <&dmac 21>, <&dmac 20>;
+ power-domains = <&power RK3528_PD_VPU>;
reg-io-width = <4>;
reg-shift = <2>;
status = "disabled";
@@ -686,6 +695,7 @@
clock-names = "baudclk", "apb_pclk";
interrupts = <GIC_SPI 47 IRQ_TYPE_LEVEL_HIGH>;
dmas = <&dmac 23>, <&dmac 22>;
+ power-domains = <&power RK3528_PD_VPU>;
reg-io-width = <4>;
reg-shift = <2>;
status = "disabled";
@@ -698,6 +708,7 @@
clocks = <&cru CLK_I2C0>, <&cru PCLK_I2C0>;
clock-names = "i2c", "pclk";
interrupts = <GIC_SPI 61 IRQ_TYPE_LEVEL_HIGH>;
+ power-domains = <&power RK3528_PD_RKVENC>;
#address-cells = <1>;
#size-cells = <0>;
status = "disabled";
@@ -710,6 +721,7 @@
clocks = <&cru CLK_I2C1>, <&cru PCLK_I2C1>;
clock-names = "i2c", "pclk";
interrupts = <GIC_SPI 62 IRQ_TYPE_LEVEL_HIGH>;
+ power-domains = <&power RK3528_PD_RKVENC>;
#address-cells = <1>;
#size-cells = <0>;
status = "disabled";
@@ -736,6 +748,7 @@
clocks = <&cru CLK_I2C3>, <&cru PCLK_I2C3>;
clock-names = "i2c", "pclk";
interrupts = <GIC_SPI 64 IRQ_TYPE_LEVEL_HIGH>;
+ power-domains = <&power RK3528_PD_VPU>;
#address-cells = <1>;
#size-cells = <0>;
status = "disabled";
@@ -750,6 +763,7 @@
interrupts = <GIC_SPI 65 IRQ_TYPE_LEVEL_HIGH>;
pinctrl-names = "default";
pinctrl-0 = <&i2c4_xfer>;
+ power-domains = <&power RK3528_PD_VO>;
#address-cells = <1>;
#size-cells = <0>;
status = "disabled";
@@ -762,6 +776,7 @@
clocks = <&cru CLK_I2C5>, <&cru PCLK_I2C5>;
clock-names = "i2c", "pclk";
interrupts = <GIC_SPI 66 IRQ_TYPE_LEVEL_HIGH>;
+ power-domains = <&power RK3528_PD_VPU>;
#address-cells = <1>;
#size-cells = <0>;
status = "disabled";
@@ -774,6 +789,7 @@
clocks = <&cru CLK_I2C6>, <&cru PCLK_I2C6>;
clock-names = "i2c", "pclk";
interrupts = <GIC_SPI 67 IRQ_TYPE_LEVEL_HIGH>;
+ power-domains = <&power RK3528_PD_VPU>;
#address-cells = <1>;
#size-cells = <0>;
status = "disabled";
@@ -788,6 +804,7 @@
interrupts = <GIC_SPI 68 IRQ_TYPE_LEVEL_HIGH>;
pinctrl-names = "default";
pinctrl-0 = <&i2c7_xfer>;
+ power-domains = <&power RK3528_PD_VO>;
#address-cells = <1>;
#size-cells = <0>;
status = "disabled";
@@ -879,6 +896,7 @@
clocks = <&cru CLK_SARADC>, <&cru PCLK_SARADC>;
clock-names = "saradc", "apb_pclk";
interrupts = <GIC_SPI 140 IRQ_TYPE_LEVEL_HIGH>;
+ power-domains = <&power RK3528_PD_VPU>;
resets = <&cru SRST_P_SARADC>;
reset-names = "saradc-apb";
#io-channel-cells = <1>;
@@ -899,6 +917,7 @@
interrupt-names = "macirq", "eth_wake_irq";
phy-handle = <&rmii0_phy>;
phy-mode = "rmii";
+ power-domains = <&power RK3528_PD_VO>;
resets = <&cru SRST_A_MAC_VO>;
reset-names = "stmmaceth";
rockchip,grf = <&vo_grf>;
@@ -957,6 +976,7 @@
interrupts = <GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 124 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "macirq", "eth_wake_irq";
+ power-domains = <&power RK3528_PD_VPU>;
resets = <&cru SRST_A_MAC>;
reset-names = "stmmaceth";
rockchip,grf = <&vpu_grf>;
@@ -1007,6 +1027,7 @@
pinctrl-names = "default";
pinctrl-0 = <&emmc_bus8>, <&emmc_clk>, <&emmc_cmd>,
<&emmc_strb>;
+ power-domains = <&power RK3528_PD_VPU>;
resets = <&cru SRST_C_EMMC>, <&cru SRST_H_EMMC>,
<&cru SRST_A_EMMC>, <&cru SRST_B_EMMC>,
<&cru SRST_T_EMMC>;
@@ -1028,6 +1049,7 @@
max-frequency = <200000000>;
pinctrl-names = "default";
pinctrl-0 = <&sdio0_bus4>, <&sdio0_clk>, <&sdio0_cmd>;
+ power-domains = <&power RK3528_PD_VPU>;
resets = <&cru SRST_H_SDIO0>;
reset-names = "reset";
status = "disabled";
@@ -1047,6 +1069,7 @@
max-frequency = <200000000>;
pinctrl-names = "default";
pinctrl-0 = <&sdio1_bus4>, <&sdio1_clk>, <&sdio1_cmd>;
+ power-domains = <&power RK3528_PD_VPU>;
resets = <&cru SRST_H_SDIO1>;
reset-names = "reset";
status = "disabled";
@@ -1067,6 +1090,7 @@
pinctrl-names = "default";
pinctrl-0 = <&sdmmc_bus4>, <&sdmmc_clk>, <&sdmmc_cmd>,
<&sdmmc_det>;
+ power-domains = <&power RK3528_PD_VO>;
resets = <&cru SRST_H_SDMMC0>;
reset-names = "reset";
rockchip,default-sample-phase = <90>;
generated by cgit (git 2.34.1) at 2025-10-31 14:34:02 +0000