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-rw-r--r--drivers/gpu/drm/panthor/panthor_devfreq.c32
1 files changed, 23 insertions, 9 deletions
diff --git a/drivers/gpu/drm/panthor/panthor_devfreq.c b/drivers/gpu/drm/panthor/panthor_devfreq.c
index d4a92f9b84ae..2249b41ca4af 100644
--- a/drivers/gpu/drm/panthor/panthor_devfreq.c
+++ b/drivers/gpu/drm/panthor/panthor_devfreq.c
@@ -142,6 +142,7 @@ int panthor_devfreq_init(struct panthor_device *ptdev)
struct thermal_cooling_device *cooling;
struct device *dev = ptdev->base.dev;
struct panthor_devfreq *pdevfreq;
+ struct opp_table *table;
struct dev_pm_opp *opp;
unsigned long cur_freq;
unsigned long freq = ULONG_MAX;
@@ -153,17 +154,30 @@ int panthor_devfreq_init(struct panthor_device *ptdev)
ptdev->devfreq = pdevfreq;
- ret = devm_pm_opp_set_regulators(dev, reg_names);
- if (ret && ret != -ENODEV) {
- if (ret != -EPROBE_DEFER)
- DRM_DEV_ERROR(dev, "Couldn't set OPP regulators\n");
- return ret;
+ /*
+ * The power domain associated with the GPU may have already added an
+ * OPP table, complete with OPPs, as part of the platform bus
+ * initialization. If this is the case, the power domain is in charge of
+ * also controlling the performance, with a set_performance callback.
+ * Only add a new OPP table from DT if there isn't such a table present
+ * already.
+ */
+ table = dev_pm_opp_get_opp_table(dev);
+ if (IS_ERR_OR_NULL(table)) {
+ ret = devm_pm_opp_set_regulators(dev, reg_names);
+ if (ret && ret != -ENODEV) {
+ if (ret != -EPROBE_DEFER)
+ DRM_DEV_ERROR(dev, "Couldn't set OPP regulators\n");
+ return ret;
+ }
+
+ ret = devm_pm_opp_of_add_table(dev);
+ if (ret)
+ return ret;
+ } else {
+ dev_pm_opp_put_opp_table(table);
}
- ret = devm_pm_opp_of_add_table(dev);
- if (ret)
- return ret;
-
spin_lock_init(&pdevfreq->lock);
panthor_devfreq_reset(pdevfreq);