diff options
| -rw-r--r-- | arch/arm64/boot/dts/mediatek/mt8192-asurada.dtsi | 4 | ||||
| -rw-r--r-- | arch/arm64/boot/dts/mediatek/mt8192.dtsi | 2 |
2 files changed, 5 insertions, 1 deletions
diff --git a/arch/arm64/boot/dts/mediatek/mt8192-asurada.dtsi b/arch/arm64/boot/dts/mediatek/mt8192-asurada.dtsi index 9f12257ab4e7..ec013d5ef157 100644 --- a/arch/arm64/boot/dts/mediatek/mt8192-asurada.dtsi +++ b/arch/arm64/boot/dts/mediatek/mt8192-asurada.dtsi @@ -380,6 +380,10 @@ pinctrl-0 = <&i2c7_pins>; }; +&mfg0 { + domain-supply = <&mt6315_7_vbuck1>; +}; + &mipi_tx0 { status = "okay"; }; diff --git a/arch/arm64/boot/dts/mediatek/mt8192.dtsi b/arch/arm64/boot/dts/mediatek/mt8192.dtsi index a29cdff8a095..f19d4a8ef3f6 100644 --- a/arch/arm64/boot/dts/mediatek/mt8192.dtsi +++ b/arch/arm64/boot/dts/mediatek/mt8192.dtsi @@ -497,7 +497,7 @@ #power-domain-cells = <0>; }; - power-domain@MT8192_POWER_DOMAIN_MFG0 { + mfg0: power-domain@MT8192_POWER_DOMAIN_MFG0 { reg = <MT8192_POWER_DOMAIN_MFG0>; clocks = <&topckgen CLK_TOP_MFG_PLL_SEL>, <&topckgen CLK_TOP_MFG_REF_SEL>; |