diff options
| -rw-r--r-- | Documentation/devicetree/bindings/clock/qcom,gcc-ipq8064.yaml | 76 | ||||
| -rw-r--r-- | Documentation/devicetree/bindings/clock/qcom,gcc-other.yaml | 3 | 
2 files changed, 76 insertions, 3 deletions
diff --git a/Documentation/devicetree/bindings/clock/qcom,gcc-ipq8064.yaml b/Documentation/devicetree/bindings/clock/qcom,gcc-ipq8064.yaml new file mode 100644 index 000000000000..9eb91dd22557 --- /dev/null +++ b/Documentation/devicetree/bindings/clock/qcom,gcc-ipq8064.yaml @@ -0,0 +1,76 @@ +# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/clock/qcom,gcc-ipq8064.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Qualcomm Global Clock & Reset Controller Binding for IPQ8064 + +allOf: +  - $ref: qcom,gcc.yaml# + +maintainers: +  - Ansuel Smith <ansuelsmth@gmail.com> + +description: | +  Qualcomm global clock control module which supports the clocks, resets and +  power domains on IPQ8064. + +  See also: +  - dt-bindings/clock/qcom,gcc-ipq806x.h (qcom,gcc-ipq8064) +  - dt-bindings/reset/qcom,gcc-ipq806x.h (qcom,gcc-ipq8064) + +properties: +  compatible: +    items: +      - const: qcom,gcc-ipq8064 +      - const: syscon + +  clocks: +    items: +      - description: PXO source +      - description: CXO source + +  clock-names: +    items: +      - const: pxo +      - const: cxo + +  thermal-sensor: +    type: object + +    allOf: +      - $ref: /schemas/thermal/qcom-tsens.yaml# + +required: +  - compatible +  - clocks +  - clock-names + +unevaluatedProperties: false + +examples: +  - | +    #include <dt-bindings/interrupt-controller/arm-gic.h> + +    gcc: clock-controller@900000 { +      compatible = "qcom,gcc-ipq8064", "syscon"; +      reg = <0x00900000 0x4000>; +      clocks = <&pxo_board>, <&cxo_board>; +      clock-names = "pxo", "cxo"; +      #clock-cells = <1>; +      #reset-cells = <1>; +      #power-domain-cells = <1>; + +      tsens: thermal-sensor { +        compatible = "qcom,ipq8064-tsens"; + +        nvmem-cells = <&tsens_calib>, <&tsens_calib_backup>; +        nvmem-cell-names = "calib", "calib_backup"; +        interrupts = <GIC_SPI 178 IRQ_TYPE_LEVEL_HIGH>; +        interrupt-names = "uplow"; + +        #qcom,sensors = <11>; +        #thermal-sensor-cells = <1>; +      }; +    }; diff --git a/Documentation/devicetree/bindings/clock/qcom,gcc-other.yaml b/Documentation/devicetree/bindings/clock/qcom,gcc-other.yaml index 47e1c5332d76..4dc0274dbd6b 100644 --- a/Documentation/devicetree/bindings/clock/qcom,gcc-other.yaml +++ b/Documentation/devicetree/bindings/clock/qcom,gcc-other.yaml @@ -18,8 +18,6 @@ description:    - dt-bindings/clock/qcom,gcc-ipq4019.h    - dt-bindings/clock/qcom,gcc-ipq6018.h    - dt-bindings/reset/qcom,gcc-ipq6018.h -  - dt-bindings/clock/qcom,gcc-ipq806x.h (qcom,gcc-ipq8064) -  - dt-bindings/reset/qcom,gcc-ipq806x.h (qcom,gcc-ipq8064)    - dt-bindings/clock/qcom,gcc-msm8939.h    - dt-bindings/clock/qcom,gcc-msm8953.h    - dt-bindings/reset/qcom,gcc-msm8939.h @@ -40,7 +38,6 @@ properties:      enum:        - qcom,gcc-ipq4019        - qcom,gcc-ipq6018 -      - qcom,gcc-ipq8064        - qcom,gcc-mdm9607        - qcom,gcc-msm8226        - qcom,gcc-msm8660  | 
