diff options
| -rw-r--r-- | arch/arm64/boot/dts/mediatek/mt7986a.dtsi | 12 |
1 files changed, 11 insertions, 1 deletions
diff --git a/arch/arm64/boot/dts/mediatek/mt7986a.dtsi b/arch/arm64/boot/dts/mediatek/mt7986a.dtsi index 559990dcd1d1..550f569451fb 100644 --- a/arch/arm64/boot/dts/mediatek/mt7986a.dtsi +++ b/arch/arm64/boot/dts/mediatek/mt7986a.dtsi @@ -523,7 +523,7 @@ eth: ethernet@15100000 { compatible = "mediatek,mt7986-eth"; - reg = <0 0x15100000 0 0x80000>; + reg = <0 0x15100000 0 0x40000>; interrupts = <GIC_SPI 196 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 197 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 198 IRQ_TYPE_LEVEL_HIGH>, @@ -553,6 +553,7 @@ <&topckgen CLK_TOP_SGM_325M_SEL>; assigned-clock-parents = <&apmixedsys CLK_APMIXED_NET2PLL>, <&apmixedsys CLK_APMIXED_SGMPLL>; + sram = <ð_sram>; #address-cells = <1>; #size-cells = <0>; mediatek,ethsys = <ðsys>; @@ -562,6 +563,15 @@ status = "disabled"; }; + /*15100000+0x40000*/ + eth_sram: sram@15140000 { + compatible = "mmio-sram"; + reg = <0 0x15140000 0 0x40000>; + #address-cells = <1>; + #size-cells = <1>; + ranges = <0 0x15140000 0 0x40000>; + }; + wo_ccif0: syscon@151a5000 { compatible = "mediatek,mt7986-wo-ccif", "syscon"; reg = <0 0x151a5000 0 0x1000>; |