diff options
| -rw-r--r-- | arch/arm64/boot/dts/qcom/ipq5424-rdp466.dts | 18 | ||||
| -rw-r--r-- | arch/arm64/boot/dts/qcom/ipq5424.dtsi | 9 |
2 files changed, 27 insertions, 0 deletions
diff --git a/arch/arm64/boot/dts/qcom/ipq5424-rdp466.dts b/arch/arm64/boot/dts/qcom/ipq5424-rdp466.dts index 117f1785e8b8..738618551203 100644 --- a/arch/arm64/boot/dts/qcom/ipq5424-rdp466.dts +++ b/arch/arm64/boot/dts/qcom/ipq5424-rdp466.dts @@ -224,6 +224,13 @@ }; }; + uart0_pins: uart0-default-state { + pins = "gpio10", "gpio11", "gpio12", "gpio13"; + function = "uart0"; + drive-strength = <8>; + bias-pull-down; + }; + pcie2_default_state: pcie2-default-state { pins = "gpio31"; function = "gpio"; @@ -239,6 +246,17 @@ }; }; +&uart0 { + pinctrl-0 = <&uart0_pins>; + pinctrl-names = "default"; + /* + * The required initialization for this SE is not handled by the + * bootloader. Therefore, keep the device in "reserved" state until + * linux gains support for configuring the SE. + */ + status = "reserved"; +}; + &uart1 { pinctrl-0 = <&uart1_pins>; pinctrl-names = "default"; diff --git a/arch/arm64/boot/dts/qcom/ipq5424.dtsi b/arch/arm64/boot/dts/qcom/ipq5424.dtsi index 2eea8a078595..bd891e39f33e 100644 --- a/arch/arm64/boot/dts/qcom/ipq5424.dtsi +++ b/arch/arm64/boot/dts/qcom/ipq5424.dtsi @@ -442,6 +442,15 @@ #address-cells = <2>; #size-cells = <2>; + uart0: serial@1a80000 { + compatible = "qcom,geni-uart"; + reg = <0 0x01a80000 0 0x4000>; + clocks = <&gcc GCC_QUPV3_UART0_CLK>; + clock-names = "se"; + interrupts = <GIC_SPI 339 IRQ_TYPE_LEVEL_HIGH>; + status = "disabled"; + }; + uart1: serial@1a84000 { compatible = "qcom,geni-debug-uart"; reg = <0 0x01a84000 0 0x4000>; |