diff options
| -rw-r--r-- | arch/x86/include/asm/cpuid/types.h | 15 | ||||
| -rw-r--r-- | arch/x86/kernel/cpu/cacheinfo.c | 9 |
2 files changed, 17 insertions, 7 deletions
diff --git a/arch/x86/include/asm/cpuid/types.h b/arch/x86/include/asm/cpuid/types.h index 753f6c4514f4..39c3c79c081b 100644 --- a/arch/x86/include/asm/cpuid/types.h +++ b/arch/x86/include/asm/cpuid/types.h @@ -2,6 +2,7 @@ #ifndef _ASM_X86_CPUID_TYPES_H #define _ASM_X86_CPUID_TYPES_H +#include <linux/build_bug.h> #include <linux/types.h> /* @@ -45,4 +46,18 @@ union leaf_0x2_regs { u8 desc[16]; }; +/* + * Leaf 0x2 1-byte descriptors' cache types + * To be used for their mappings at cache_table[] + */ +enum _cache_table_type { + CACHE_L1_INST, + CACHE_L1_DATA, + CACHE_L2, + CACHE_L3, +} __packed; +#ifndef __CHECKER__ +static_assert(sizeof(enum _cache_table_type) == 1); +#endif + #endif /* _ASM_X86_CPUID_TYPES_H */ diff --git a/arch/x86/kernel/cpu/cacheinfo.c b/arch/x86/kernel/cpu/cacheinfo.c index 626f55f960dc..09c5aa9af973 100644 --- a/arch/x86/kernel/cpu/cacheinfo.c +++ b/arch/x86/kernel/cpu/cacheinfo.c @@ -23,11 +23,6 @@ #include "cpu.h" -#define CACHE_L1_INST 1 -#define CACHE_L1_DATA 2 -#define CACHE_L2 3 -#define CACHE_L3 4 - /* Shared last level cache maps */ DEFINE_PER_CPU_READ_MOSTLY(cpumask_var_t, cpu_llc_shared_map); @@ -41,7 +36,7 @@ unsigned int memory_caching_control __ro_after_init; struct _cache_table { u8 descriptor; - char cache_type; + enum _cache_table_type type; short size; }; @@ -520,7 +515,7 @@ void init_intel_cacheinfo(struct cpuinfo_x86 *c) if (!entry) continue; - switch (entry->cache_type) { + switch (entry->type) { case CACHE_L1_INST: l1i += entry->size; break; case CACHE_L1_DATA: l1d += entry->size; break; case CACHE_L2: l2 += entry->size; break; |