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-rw-r--r--Documentation/devicetree/bindings/cache/andestech,ax45mp-cache.yaml20
1 files changed, 19 insertions, 1 deletions
diff --git a/Documentation/devicetree/bindings/cache/andestech,ax45mp-cache.yaml b/Documentation/devicetree/bindings/cache/andestech,ax45mp-cache.yaml
index d2cbe49f4e15..4de5bb2e5f24 100644
--- a/Documentation/devicetree/bindings/cache/andestech,ax45mp-cache.yaml
+++ b/Documentation/devicetree/bindings/cache/andestech,ax45mp-cache.yaml
@@ -28,6 +28,9 @@ select:
properties:
compatible:
items:
+ - enum:
+ - andestech,qilai-ax45mp-cache
+ - renesas,r9a07g043f-ax45mp-cache
- const: andestech,ax45mp-cache
- const: cache
@@ -65,12 +68,27 @@ required:
- cache-size
- cache-unified
+allOf:
+ - if:
+ properties:
+ compatible:
+ contains:
+ const: andestech,qilai-ax45mp-cache
+
+ then:
+ properties:
+ cache-sets:
+ const: 2048
+ cache-size:
+ const: 2097152
+
examples:
- |
#include <dt-bindings/interrupt-controller/irq.h>
cache-controller@13400000 {
- compatible = "andestech,ax45mp-cache", "cache";
+ compatible = "renesas,r9a07g043f-ax45mp-cache", "andestech,ax45mp-cache",
+ "cache";
reg = <0x13400000 0x100000>;
interrupts = <508 IRQ_TYPE_LEVEL_HIGH>;
cache-line-size = <64>;