summaryrefslogtreecommitdiff
path: root/arch/arm/boot/dts/nuvoton
diff options
context:
space:
mode:
Diffstat (limited to 'arch/arm/boot/dts/nuvoton')
-rw-r--r--arch/arm/boot/dts/nuvoton/nuvoton-common-npcm7xx.dtsi108
-rw-r--r--arch/arm/boot/dts/nuvoton/nuvoton-npcm730-gbs.dts12
-rw-r--r--arch/arm/boot/dts/nuvoton/nuvoton-npcm750-runbmc-olympus.dts120
-rw-r--r--arch/arm/boot/dts/nuvoton/nuvoton-npcm750.dtsi65
4 files changed, 239 insertions, 66 deletions
diff --git a/arch/arm/boot/dts/nuvoton/nuvoton-common-npcm7xx.dtsi b/arch/arm/boot/dts/nuvoton/nuvoton-common-npcm7xx.dtsi
index 868454ae6bde..791090f54d8b 100644
--- a/arch/arm/boot/dts/nuvoton/nuvoton-common-npcm7xx.dtsi
+++ b/arch/arm/boot/dts/nuvoton/nuvoton-common-npcm7xx.dtsi
@@ -99,6 +99,11 @@
};
};
+ udc0_phy: usb-phy {
+ compatible = "usb-nop-xceiv";
+ #phy-cells = <0>;
+ };
+
ahb {
#address-cells = <1>;
#size-cells = <1>;
@@ -122,6 +127,13 @@
clocks = <&clk_refclk>, <&clk_sysbypck>, <&clk_mcbypck>;
};
+ mc: memory-controller@f0824000 {
+ compatible = "nuvoton,npcm750-memory-controller";
+ reg = <0xf0824000 0x1000>;
+ interrupts = <GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>;
+ status = "disabled";
+ };
+
gmac0: eth@f0802000 {
device_type = "network";
compatible = "snps,dwmac";
@@ -137,6 +149,29 @@
status = "disabled";
};
+ sdmmc: mmc@f0842000 {
+ compatible = "nuvoton,npcm750-sdhci";
+ status = "disabled";
+ reg = <0xf0842000 0x200>;
+ interrupts = <GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&clk NPCM7XX_CLK_AHB>;
+ clock-names = "clk_mmc";
+ pinctrl-names = "default";
+ pinctrl-0 = <&mmc8_pins
+ &mmc_pins>;
+ };
+
+ sdhci: mmc@f0840000 {
+ compatible = "nuvoton,npcm750-sdhci";
+ status = "disabled";
+ reg = <0xf0840000 0x200>;
+ interrupts = <GIC_SPI 27 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&clk NPCM7XX_CLK_AHB>;
+ clock-names = "clk_sdhc";
+ pinctrl-names = "default";
+ pinctrl-0 = <&sd1_pins>;
+ };
+
ehci1: usb@f0806000 {
compatible = "nuvoton,npcm750-ehci";
reg = <0xf0806000 0x1000>;
@@ -144,6 +179,13 @@
status = "disabled";
};
+ ohci1: usb@f0807000 {
+ compatible = "generic-ohci";
+ reg = <0xf0807000 0x1000>;
+ interrupts = <GIC_SPI 62 IRQ_TYPE_LEVEL_HIGH>;
+ status = "disabled";
+ };
+
fiu0: spi@fb000000 {
compatible = "nuvoton,npcm750-fiu";
#address-cells = <1>;
@@ -179,6 +221,72 @@
status = "disabled";
};
+ udc5: usb@f0835000 {
+ compatible = "nuvoton,npcm750-udc";
+ reg = <0xf0835000 0x1000
+ 0xfffd2800 0x800>;
+ interrupts = <GIC_SPI 56 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&clk NPCM7XX_CLK_SU>;
+ clock-names = "clk_usb_bridge";
+ phys = <&udc0_phy>;
+ phy_type = "utmi_wide";
+ dr_mode = "peripheral";
+ status = "disabled";
+ };
+
+ udc6: usb@f0836000 {
+ compatible = "nuvoton,npcm750-udc";
+ reg = <0xf0836000 0x1000
+ 0xfffd3000 0x800>;
+ interrupts = <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&clk NPCM7XX_CLK_SU>;
+ clock-names = "clk_usb_bridge";
+ phys = <&udc0_phy>;
+ phy_type = "utmi_wide";
+ dr_mode = "peripheral";
+ status = "disabled";
+ };
+
+ udc7: usb@f0837000 {
+ compatible = "nuvoton,npcm750-udc";
+ reg = <0xf0837000 0x1000
+ 0xfffd3800 0x800>;
+ interrupts = <GIC_SPI 58 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&clk NPCM7XX_CLK_SU>;
+ clock-names = "clk_usb_bridge";
+ phys = <&udc0_phy>;
+ phy_type = "utmi_wide";
+ dr_mode = "peripheral";
+ status = "disabled";
+ };
+
+ udc8: usb@f0838000 {
+ compatible = "nuvoton,npcm750-udc";
+ reg = <0xf0838000 0x1000
+ 0xfffd4000 0x800>;
+ interrupts = <GIC_SPI 59 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&clk NPCM7XX_CLK_SU>;
+ clock-names = "clk_usb_bridge";
+ phys = <&udc0_phy>;
+ phy_type = "utmi_wide";
+ dr_mode = "peripheral";
+ status = "disabled";
+ };
+
+ udc9: usb@f0839000 {
+ compatible = "nuvoton,npcm750-udc";
+ reg = <0xf0839000 0x1000
+ 0xfffd4800 0x800>;
+ interrupts = <GIC_SPI 60 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&clk NPCM7XX_CLK_SU>;
+ clock-names = "clk_usb_bridge";
+ nuvoton,sysgcr = <&gcr>;
+ phys = <&udc0_phy>;
+ phy_type = "utmi_wide";
+ dr_mode = "peripheral";
+ status = "disabled";
+ };
+
apb {
#address-cells = <1>;
#size-cells = <1>;
diff --git a/arch/arm/boot/dts/nuvoton/nuvoton-npcm730-gbs.dts b/arch/arm/boot/dts/nuvoton/nuvoton-npcm730-gbs.dts
index c3501786d600..231228842e63 100644
--- a/arch/arm/boot/dts/nuvoton/nuvoton-npcm730-gbs.dts
+++ b/arch/arm/boot/dts/nuvoton/nuvoton-npcm730-gbs.dts
@@ -1050,19 +1050,19 @@
"","","","SIO_POWER_GOOD","","","","";
};
gpio2: gpio@f0012000 {
- bmc_usb_mux_oe_n {
+ bmc-usb-mux-oe-n-hog {
gpio-hog;
gpios = <25 GPIO_ACTIVE_HIGH>;
output-low;
line-name = "bmc-usb-mux-oe-n";
};
- bmc_usb_mux_sel {
+ bmc-usb-mux-sel-hog {
gpio-hog;
gpios = <26 GPIO_ACTIVE_HIGH>;
output-low;
line-name = "bmc-usb-mux-sel";
};
- bmc_usb2517_reset_n {
+ bmc-usb2517-reset-n-hog {
gpio-hog;
gpios = <27 GPIO_ACTIVE_LOW>;
output-low;
@@ -1070,19 +1070,19 @@
};
};
gpio3: gpio@f0013000 {
- assert_cpu0_reset {
+ assert-cpu0-reset-hog {
gpio-hog;
gpios = <14 GPIO_ACTIVE_HIGH>;
output-low;
line-name = "assert-cpu0-reset";
};
- assert_pwrok_cpu0_n {
+ assert-pwrok-cpu0-n-hog {
gpio-hog;
gpios = <15 GPIO_ACTIVE_HIGH>;
output-low;
line-name = "assert-pwrok-cpu0-n";
};
- assert_cpu0_prochot {
+ assert-cpu0-prochot-hog {
gpio-hog;
gpios = <16 GPIO_ACTIVE_HIGH>;
output-low;
diff --git a/arch/arm/boot/dts/nuvoton/nuvoton-npcm750-runbmc-olympus.dts b/arch/arm/boot/dts/nuvoton/nuvoton-npcm750-runbmc-olympus.dts
index f67ede148209..0c94e14d40e8 100644
--- a/arch/arm/boot/dts/nuvoton/nuvoton-npcm750-runbmc-olympus.dts
+++ b/arch/arm/boot/dts/nuvoton/nuvoton-npcm750-runbmc-olympus.dts
@@ -427,91 +427,91 @@
gpio-controller;
#gpio-cells = <2>;
reset-gpios = <&gpio7 4 GPIO_ACTIVE_LOW>;
- G1A_P0_0 {
+ g1a-p0-0-hog {
gpio-hog;
gpios = <0 0>;
output-high;
line-name = "TPM_BMC_ALERT_N";
};
- G1A_P0_1 {
+ g1a-p0-1-hog {
gpio-hog;
gpios = <1 0>;
input;
line-name = "FM_BIOS_TOP_SWAP";
};
- G1A_P0_2 {
+ g1a-p0-2-hog {
gpio-hog;
gpios = <2 0>;
input;
line-name = "FM_BIOS_PREFRB2_GOOD";
};
- G1A_P0_3 {
+ g1a-p0-3-hog {
gpio-hog;
gpios = <3 0>;
input;
line-name = "BMC_SATAXPCIE_0TO3_SEL";
};
- G1A_P0_4 {
+ g1a-p0-4-hog {
gpio-hog;
gpios = <4 0>;
input;
line-name = "BMC_SATAXPCIE_4TO7_SEL";
};
- G1A_P0_5 {
+ g1a-p0-5-hog {
gpio-hog;
gpios = <5 0>;
output-low;
line-name = "FM_UV_ADR_TRIGGER_EN_N";
};
- G1A_P0_6 {
+ g1a-p0-6-hog {
gpio-hog;
gpios = <6 0>;
input;
line-name = "RM_THROTTLE_EN_N";
};
- G1A_P1_0 {
+ g1a-p1-0-hog {
gpio-hog;
gpios = <8 0>;
input;
line-name = "FM_BMC_TPM_PRES_N";
};
- G1A_P1_1 {
+ g1a-p1-1-hog {
gpio-hog;
gpios = <9 0>;
input;
line-name = "FM_CPU0_SKTOCC_LVT3_N";
};
- G1A_P1_2 {
+ g1a-p1-2-hog {
gpio-hog;
gpios = <10 0>;
input;
line-name = "FM_CPU1_SKTOCC_LVT3_N";
};
- G1A_P1_3 {
+ g1a-p1-3-hog {
gpio-hog;
gpios = <11 0>;
input;
line-name = "PSU1_ALERT_N";
};
- G1A_P1_4 {
+ g1a-p1-4-hog {
gpio-hog;
gpios = <12 0>;
input;
line-name = "PSU2_ALERT_N";
};
- G1A_P1_5 {
+ g1a-p1-5-hog {
gpio-hog;
gpios = <13 0>;
input;
line-name = "H_CPU0_FAST_WAKE_LVT3_N";
};
- G1A_P1_6 {
+ g1a-p1-6-hog {
gpio-hog;
gpios = <14 0>;
output-high;
line-name = "I2C_MUX1_RESET_N";
};
- G1A_P1_7 {
+ g1a-p1-7-hog {
gpio-hog;
gpios = <15 0>;
input;
@@ -524,91 +524,91 @@
reg = <0x75>;
gpio-controller;
#gpio-cells = <2>;
- G1B_P0_0 {
+ g1b-p0-0-hog {
gpio-hog;
gpios = <0 0>;
input;
line-name = "PVDDQ_ABC_PINALERT_N";
};
- G1B_P0_1 {
+ g1b-p0-1-hog {
gpio-hog;
gpios = <1 0>;
input;
line-name = "PVDDQ_DEF_PINALERT_N";
};
- G1B_P0_2 {
+ g1b-p0-2-hog {
gpio-hog;
gpios = <2 0>;
input;
line-name = "PVDDQ_GHJ_PINALERT_N";
};
- G1B_P0_3 {
+ g1b-p0-3-hog {
gpio-hog;
gpios = <3 0>;
input;
line-name = "PVDDQ_KLM_PINALERT_N";
};
- G1B_P0_5 {
+ g1b-p0-5-hog {
gpio-hog;
gpios = <5 0>;
input;
line-name = "FM_BOARD_REV_ID0";
};
- G1B_P0_6 {
+ g1b-p0-6-hog {
gpio-hog;
gpios = <6 0>;
input;
line-name = "FM_BOARD_REV_ID1";
};
- G1B_P0_7 {
+ g1b-p0-7-hog {
gpio-hog;
gpios = <7 0>;
input;
line-name = "FM_BOARD_REV_ID2";
};
- G1B_P1_0 {
+ g1b-p1-0-hog {
gpio-hog;
gpios = <8 0>;
input;
line-name = "FM_OC_DETECT_EN_N";
};
- G1B_P1_1 {
+ g1b-p1-1-hog {
gpio-hog;
gpios = <9 0>;
input;
line-name = "FM_FLASH_DESC_OVERRIDE";
};
- G1B_P1_2 {
+ g1b-p1-2-hog {
gpio-hog;
gpios = <10 0>;
output-low;
line-name = "FP_PWR_ID_LED_N";
};
- G1B_P1_3 {
+ g1b-p1-3-hog {
gpio-hog;
gpios = <11 0>;
output-low;
line-name = "BMC_LED_PWR_GRN";
};
- G1B_P1_4 {
+ g1b-p1-4-hog {
gpio-hog;
gpios = <12 0>;
output-low;
line-name = "BMC_LED_PWR_AMBER";
};
- G1B_P1_5 {
+ g1b-p1-5-hog {
gpio-hog;
gpios = <13 0>;
output-high;
line-name = "FM_BMC_FAULT_LED_N";
};
- G1B_P1_6 {
+ g1b-p1-6-hog {
gpio-hog;
gpios = <14 0>;
output-high;
line-name = "FM_CPLD_BMC_PWRDN_N";
};
- G1B_P1_7 {
+ g1b-p1-7-hog {
gpio-hog;
gpios = <15 0>;
output-high;
@@ -626,91 +626,91 @@
gpio-controller;
#gpio-cells = <2>;
reset-gpios = <&gpio5 28 GPIO_ACTIVE_LOW>;
- G2A_P0_0 {
+ g2a-p0-0-hog {
gpio-hog;
gpios = <0 0>;
output-high;
line-name = "BMC_PON_RST_REQ_N";
};
- G2A_P0_1 {
+ g2a-p0-1-hog {
gpio-hog;
gpios = <1 0>;
output-high;
line-name = "BMC_RST_IND_REQ_N";
};
- G2A_P0_2 {
+ g2a-p0-2-hog {
gpio-hog;
gpios = <2 0>;
input;
line-name = "RST_BMC_RTCRST";
};
- G2A_P0_3 {
+ g2a-p0-3-hog {
gpio-hog;
gpios = <3 0>;
output-high;
line-name = "FM_BMC_PWRBTN_OUT_N";
};
- G2A_P0_4 {
+ g2a-p0-4-hog {
gpio-hog;
gpios = <4 0>;
output-high;
line-name = "RST_BMC_SYSRST_BTN_OUT_N";
};
- G2A_P0_5 {
+ g2a-p0-5-hog {
gpio-hog;
gpios = <5 0>;
output-high;
line-name = "FM_BATTERY_SENSE_EN_N";
};
- G2A_P0_6 {
+ g2a-p0-6-hog {
gpio-hog;
gpios = <6 0>;
output-high;
line-name = "FM_BMC_READY_N";
};
- G2A_P0_7 {
+ g2a-p0-7-hog {
gpio-hog;
gpios = <7 0>;
input;
line-name = "IRQ_BMC_PCH_SMI_LPC_N";
};
- G2A_P1_0 {
+ g2a-p1-0-hog {
gpio-hog;
gpios = <8 0>;
input;
line-name = "FM_SLOT4_CFG0";
};
- G2A_P1_1 {
+ g2a-p1-1-hog {
gpio-hog;
gpios = <9 0>;
input;
line-name = "FM_SLOT4_CFG1";
};
- G2A_P1_2 {
+ g2a-p1-2-hog {
gpio-hog;
gpios = <10 0>;
input;
line-name = "FM_NVDIMM_EVENT_N";
};
- G2A_P1_3 {
+ g2a-p1-3-hog {
gpio-hog;
gpios = <11 0>;
input;
line-name = "PSU1_BLADE_EN_N";
};
- G2A_P1_4 {
+ g2a-p1-4-hog {
gpio-hog;
gpios = <12 0>;
input;
line-name = "BMC_PCH_FNM";
};
- G2A_P1_5 {
+ g2a-p1-5-hog {
gpio-hog;
gpios = <13 0>;
input;
line-name = "FM_SOL_UART_CH_SEL";
};
- G2A_P1_6 {
+ g2a-p1-6-hog {
gpio-hog;
gpios = <14 0>;
input;
@@ -723,91 +723,91 @@
reg = <0x75>;
gpio-controller;
#gpio-cells = <2>;
- G2B_P0_0 {
+ g2b-p0-0-hog {
gpio-hog;
gpios = <0 0>;
input;
line-name = "FM_CPU_MSMI_LVT3_N";
};
- G2B_P0_1 {
+ g2b-p0-1-hog {
gpio-hog;
gpios = <1 0>;
input;
line-name = "FM_BIOS_MRC_DEBUG_MSG_DIS";
};
- G2B_P0_2 {
+ g2b-p0-2-hog {
gpio-hog;
gpios = <2 0>;
input;
line-name = "FM_CPU1_DISABLE_BMC_N";
};
- G2B_P0_3 {
+ g2b-p0-3-hog {
gpio-hog;
gpios = <3 0>;
output-low;
line-name = "BMC_JTAG_SELECT";
};
- G2B_P0_4 {
+ g2b-p0-4-hog {
gpio-hog;
gpios = <4 0>;
output-high;
line-name = "PECI_MUX_SELECT";
};
- G2B_P0_5 {
+ g2b-p0-5-hog {
gpio-hog;
gpios = <5 0>;
output-high;
line-name = "I2C_MUX2_RESET_N";
};
- G2B_P0_6 {
+ g2b-p0-6-hog {
gpio-hog;
gpios = <6 0>;
input;
line-name = "FM_BMC_CPLD_PSU2_ON";
};
- G2B_P0_7 {
+ g2b-p0-7-hog {
gpio-hog;
gpios = <7 0>;
output-high;
line-name = "PSU2_ALERT_EN_N";
};
- G2B_P1_0 {
+ g2b-p1-0-hog {
gpio-hog;
gpios = <8 0>;
output-high;
line-name = "FM_CPU_BMC_INIT";
};
- G2B_P1_1 {
+ g2b-p1-1-hog {
gpio-hog;
gpios = <9 0>;
output-high;
line-name = "IRQ_BMC_PCH_SCI_LPC_N";
};
- G2B_P1_2 {
+ g2b-p1-2-hog {
gpio-hog;
gpios = <10 0>;
output-low;
line-name = "PMB_ALERT_EN_N";
};
- G2B_P1_3 {
+ g2b-p1-3-hog {
gpio-hog;
gpios = <11 0>;
output-high;
line-name = "FM_FAST_PROCHOT_EN_N";
};
- G2B_P1_4 {
+ g2b-p1-4-hog {
gpio-hog;
gpios = <12 0>;
output-high;
line-name = "BMC_NVDIMM_PRSNT_N";
};
- G2B_P1_5 {
+ g2b-p1-5-hog {
gpio-hog;
gpios = <13 0>;
output-low;
line-name = "FM_BACKUP_BIOS_SEL_H_BMC";
};
- G2B_P1_6 {
+ g2b-p1-6-hog {
gpio-hog;
gpios = <14 0>;
output-high;
diff --git a/arch/arm/boot/dts/nuvoton/nuvoton-npcm750.dtsi b/arch/arm/boot/dts/nuvoton/nuvoton-npcm750.dtsi
index 30eed40b89b5..f42ad259636c 100644
--- a/arch/arm/boot/dts/nuvoton/nuvoton-npcm750.dtsi
+++ b/arch/arm/boot/dts/nuvoton/nuvoton-npcm750.dtsi
@@ -58,5 +58,70 @@
&rg2mdio_pins>;
status = "disabled";
};
+
+ udc0: usb@f0830000 {
+ compatible = "nuvoton,npcm750-udc";
+ reg = <0xf0830000 0x1000
+ 0xfffd0000 0x800>;
+ interrupts = <GIC_SPI 51 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&clk NPCM7XX_CLK_SU>;
+ clock-names = "clk_usb_bridge";
+ phys = <&udc0_phy>;
+ phy_type = "utmi_wide";
+ dr_mode = "peripheral";
+ status = "disabled";
+ };
+
+ udc1: usb@f0831000 {
+ compatible = "nuvoton,npcm750-udc";
+ reg = <0xf0831000 0x1000
+ 0xfffd0800 0x800>;
+ interrupts = <GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&clk NPCM7XX_CLK_SU>;
+ clock-names = "clk_usb_bridge";
+ phys = <&udc0_phy>;
+ phy_type = "utmi_wide";
+ dr_mode = "peripheral";
+ status = "disabled";
+ };
+
+ udc2: usb@f0832000 {
+ compatible = "nuvoton,npcm750-udc";
+ reg = <0xf0832000 0x1000
+ 0xfffd1000 0x800>;
+ interrupts = <GIC_SPI 53 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&clk NPCM7XX_CLK_SU>;
+ clock-names = "clk_usb_bridge";
+ phys = <&udc0_phy>;
+ phy_type = "utmi_wide";
+ dr_mode = "peripheral";
+ status = "disabled";
+ };
+
+ udc3: usb@f0833000 {
+ compatible = "nuvoton,npcm750-udc";
+ reg = <0xf0833000 0x1000
+ 0xfffd1800 0x800>;
+ interrupts = <GIC_SPI 54 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&clk NPCM7XX_CLK_SU>;
+ clock-names = "clk_usb_bridge";
+ phys = <&udc0_phy>;
+ phy_type = "utmi_wide";
+ dr_mode = "peripheral";
+ status = "disabled";
+ };
+
+ udc4: usb@f0834000 {
+ compatible = "nuvoton,npcm750-udc";
+ reg = <0xf0834000 0x1000
+ 0xfffd2000 0x800>;
+ interrupts = <GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&clk NPCM7XX_CLK_SU>;
+ clock-names = "clk_usb_bridge";
+ phys = <&udc0_phy>;
+ phy_type = "utmi_wide";
+ dr_mode = "peripheral";
+ status = "disabled";
+ };
};
};