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Diffstat (limited to 'arch/arm64/boot/dts/allwinner/sun55i-a523.dtsi')
-rw-r--r--arch/arm64/boot/dts/allwinner/sun55i-a523.dtsi205
1 files changed, 130 insertions, 75 deletions
diff --git a/arch/arm64/boot/dts/allwinner/sun55i-a523.dtsi b/arch/arm64/boot/dts/allwinner/sun55i-a523.dtsi
index 8b7cbc2e78f5..6b6f2296bdff 100644
--- a/arch/arm64/boot/dts/allwinner/sun55i-a523.dtsi
+++ b/arch/arm64/boot/dts/allwinner/sun55i-a523.dtsi
@@ -7,6 +7,8 @@
#include <dt-bindings/clock/sun55i-a523-r-ccu.h>
#include <dt-bindings/reset/sun55i-a523-ccu.h>
#include <dt-bindings/reset/sun55i-a523-r-ccu.h>
+#include <dt-bindings/power/allwinner,sun55i-a523-ppu.h>
+#include <dt-bindings/power/allwinner,sun55i-a523-pck-600.h>
/ {
interrupt-parent = <&gic>;
@@ -106,6 +108,21 @@
#size-cells = <1>;
ranges = <0x0 0x0 0x0 0x40000000>;
+ gpu: gpu@1800000 {
+ compatible = "allwinner,sun55i-a523-mali",
+ "arm,mali-valhall-jm";
+ reg = <0x1800000 0x10000>;
+ interrupts = <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 119 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "job", "mmu", "gpu";
+ clocks = <&ccu CLK_GPU>, <&ccu CLK_BUS_GPU>;
+ clock-names = "core", "bus";
+ power-domains = <&pck600 PD_GPU>;
+ resets = <&ccu RST_BUS_GPU>;
+ status = "disabled";
+ };
+
pio: pinctrl@2000000 {
compatible = "allwinner,sun55i-a523-pinctrl";
reg = <0x2000000 0x800>;
@@ -126,16 +143,6 @@
interrupt-controller;
#interrupt-cells = <3>;
- rgmii0_pins: rgmii0-pins {
- pins = "PH0", "PH1", "PH2", "PH3", "PH4",
- "PH5", "PH6", "PH7", "PH9", "PH10",
- "PH14", "PH15", "PH16", "PH17", "PH18";
- allwinner,pinmux = <5>;
- function = "emac0";
- drive-strength = <40>;
- bias-disable;
- };
-
mmc0_pins: mmc0-pins {
pins = "PF0" ,"PF1", "PF2", "PF3", "PF4", "PF5";
allwinner,pinmux = <2>;
@@ -163,11 +170,35 @@
bias-pull-up;
};
+ rgmii0_pins: rgmii0-pins {
+ pins = "PH0", "PH1", "PH2", "PH3", "PH4",
+ "PH5", "PH6", "PH7", "PH9", "PH10",
+ "PH14", "PH15", "PH16", "PH17", "PH18";
+ allwinner,pinmux = <5>;
+ function = "gmac0";
+ drive-strength = <40>;
+ bias-disable;
+ };
+
uart0_pb_pins: uart0-pb-pins {
pins = "PB9", "PB10";
allwinner,pinmux = <2>;
function = "uart0";
};
+
+ /omit-if-no-ref/
+ uart1_pins: uart1-pins {
+ pins = "PG6", "PG7";
+ function = "uart1";
+ allwinner,pinmux = <2>;
+ };
+
+ /omit-if-no-ref/
+ uart1_rts_cts_pins: uart1-rts-cts-pins {
+ pins = "PG8", "PG9";
+ function = "uart1";
+ allwinner,pinmux = <2>;
+ };
};
ccu: clock-controller@2001000 {
@@ -181,69 +212,6 @@
#reset-cells = <1>;
};
- mmc0: mmc@4020000 {
- compatible = "allwinner,sun55i-a523-mmc",
- "allwinner,sun20i-d1-mmc";
- reg = <0x04020000 0x1000>;
- clocks = <&ccu CLK_BUS_MMC0>, <&ccu CLK_MMC0>;
- clock-names = "ahb", "mmc";
- resets = <&ccu RST_BUS_MMC0>;
- reset-names = "ahb";
- interrupts = <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>;
- pinctrl-names = "default";
- pinctrl-0 = <&mmc0_pins>;
- status = "disabled";
-
- max-frequency = <150000000>;
- cap-sd-highspeed;
- cap-mmc-highspeed;
- cap-sdio-irq;
- #address-cells = <1>;
- #size-cells = <0>;
- };
-
- mmc1: mmc@4021000 {
- compatible = "allwinner,sun55i-a523-mmc",
- "allwinner,sun20i-d1-mmc";
- reg = <0x04021000 0x1000>;
- clocks = <&ccu CLK_BUS_MMC1>, <&ccu CLK_MMC1>;
- clock-names = "ahb", "mmc";
- resets = <&ccu RST_BUS_MMC1>;
- reset-names = "ahb";
- interrupts = <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>;
- pinctrl-names = "default";
- pinctrl-0 = <&mmc1_pins>;
- status = "disabled";
-
- max-frequency = <150000000>;
- cap-sd-highspeed;
- cap-mmc-highspeed;
- cap-sdio-irq;
- #address-cells = <1>;
- #size-cells = <0>;
- };
-
- mmc2: mmc@4022000 {
- compatible = "allwinner,sun55i-a523-mmc",
- "allwinner,sun20i-d1-mmc";
- reg = <0x04022000 0x1000>;
- clocks = <&ccu CLK_BUS_MMC2>, <&ccu CLK_MMC2>;
- clock-names = "ahb", "mmc";
- resets = <&ccu RST_BUS_MMC2>;
- reset-names = "ahb";
- interrupts = <GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>;
- pinctrl-names = "default";
- pinctrl-0 = <&mmc2_pins>;
- status = "disabled";
-
- max-frequency = <150000000>;
- cap-sd-highspeed;
- cap-mmc-highspeed;
- cap-sdio-irq;
- #address-cells = <1>;
- #size-cells = <0>;
- };
-
wdt: watchdog@2050000 {
compatible = "allwinner,sun55i-a523-wdt";
reg = <0x2050000 0x20>;
@@ -428,6 +396,14 @@
ranges;
};
+ sid: efuse@3006000 {
+ compatible = "allwinner,sun55i-a523-sid",
+ "allwinner,sun50i-a64-sid";
+ reg = <0x03006000 0x1000>;
+ #address-cells = <1>;
+ #size-cells = <1>;
+ };
+
gic: interrupt-controller@3400000 {
compatible = "arm,gic-v3";
#address-cells = <1>;
@@ -449,6 +425,69 @@
};
};
+ mmc0: mmc@4020000 {
+ compatible = "allwinner,sun55i-a523-mmc",
+ "allwinner,sun20i-d1-mmc";
+ reg = <0x04020000 0x1000>;
+ clocks = <&ccu CLK_BUS_MMC0>, <&ccu CLK_MMC0>;
+ clock-names = "ahb", "mmc";
+ resets = <&ccu RST_BUS_MMC0>;
+ reset-names = "ahb";
+ interrupts = <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&mmc0_pins>;
+ status = "disabled";
+
+ max-frequency = <150000000>;
+ cap-sd-highspeed;
+ cap-mmc-highspeed;
+ cap-sdio-irq;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ };
+
+ mmc1: mmc@4021000 {
+ compatible = "allwinner,sun55i-a523-mmc",
+ "allwinner,sun20i-d1-mmc";
+ reg = <0x04021000 0x1000>;
+ clocks = <&ccu CLK_BUS_MMC1>, <&ccu CLK_MMC1>;
+ clock-names = "ahb", "mmc";
+ resets = <&ccu RST_BUS_MMC1>;
+ reset-names = "ahb";
+ interrupts = <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&mmc1_pins>;
+ status = "disabled";
+
+ max-frequency = <150000000>;
+ cap-sd-highspeed;
+ cap-mmc-highspeed;
+ cap-sdio-irq;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ };
+
+ mmc2: mmc@4022000 {
+ compatible = "allwinner,sun55i-a523-mmc",
+ "allwinner,sun20i-d1-mmc";
+ reg = <0x04022000 0x1000>;
+ clocks = <&ccu CLK_BUS_MMC2>, <&ccu CLK_MMC2>;
+ clock-names = "ahb", "mmc";
+ resets = <&ccu RST_BUS_MMC2>;
+ reset-names = "ahb";
+ interrupts = <GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&mmc2_pins>;
+ status = "disabled";
+
+ max-frequency = <150000000>;
+ cap-sd-highspeed;
+ cap-mmc-highspeed;
+ cap-sdio-irq;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ };
+
usb_otg: usb@4100000 {
compatible = "allwinner,sun55i-a523-musb",
"allwinner,sun8i-a33-musb";
@@ -540,8 +579,8 @@
status = "disabled";
};
- emac0: ethernet@4500000 {
- compatible = "allwinner,sun55i-a523-emac0",
+ gmac0: ethernet@4500000 {
+ compatible = "allwinner,sun55i-a523-gmac0",
"allwinner,sun50i-a64-emac";
reg = <0x04500000 0x10000>;
clocks = <&ccu CLK_BUS_EMAC0>;
@@ -562,6 +601,14 @@
};
};
+ ppu: power-controller@7001400 {
+ compatible = "allwinner,sun55i-a523-ppu";
+ reg = <0x07001400 0x400>;
+ clocks = <&r_ccu CLK_BUS_R_PPU1>;
+ resets = <&r_ccu RST_BUS_R_PPU1>;
+ #power-domain-cells = <1>;
+ };
+
r_ccu: clock-controller@7010000 {
compatible = "allwinner,sun55i-a523-r-ccu";
reg = <0x7010000 0x250>;
@@ -608,6 +655,14 @@
};
};
+ pck600: power-controller@7060000 {
+ compatible = "allwinner,sun55i-a523-pck-600";
+ reg = <0x07060000 0x8000>;
+ clocks = <&r_ccu CLK_BUS_R_PPU0>;
+ resets = <&r_ccu RST_BUS_R_PPU0>;
+ #power-domain-cells = <1>;
+ };
+
r_i2c0: i2c@7081400 {
compatible = "allwinner,sun55i-a523-i2c",
"allwinner,sun8i-v536-i2c",
generated by cgit (git 2.34.1) at 2025-07-30 23:45:33 +0000