diff options
Diffstat (limited to 'arch/arm64/boot/dts/renesas/rzg3e-smarc-som.dtsi')
| -rw-r--r-- | arch/arm64/boot/dts/renesas/rzg3e-smarc-som.dtsi | 157 |
1 files changed, 157 insertions, 0 deletions
diff --git a/arch/arm64/boot/dts/renesas/rzg3e-smarc-som.dtsi b/arch/arm64/boot/dts/renesas/rzg3e-smarc-som.dtsi index ecea29a76b14..7faa44510d98 100644 --- a/arch/arm64/boot/dts/renesas/rzg3e-smarc-som.dtsi +++ b/arch/arm64/boot/dts/renesas/rzg3e-smarc-som.dtsi @@ -26,6 +26,8 @@ compatible = "renesas,rzg3e-smarcm", "renesas,r9a09g047e57", "renesas,r9a09g047"; aliases { + ethernet0 = ð0; + ethernet1 = ð1; i2c2 = &i2c2; mmc0 = &sdhi0; mmc2 = &sdhi2; @@ -77,6 +79,24 @@ clock-frequency = <48000000>; }; +ð0 { + phy-handle = <&phy0>; + phy-mode = "rgmii-id"; + + pinctrl-0 = <ð0_pins>; + pinctrl-names = "default"; + status = "okay"; +}; + +ð1 { + phy-handle = <&phy1>; + phy-mode = "rgmii-id"; + + pinctrl-0 = <ð1_pins>; + pinctrl-names = "default"; + status = "okay"; +}; + &gpu { status = "okay"; mali-supply = <®_vdd0p8v_others>; @@ -102,7 +122,98 @@ }; }; +&mdio0 { + phy0: ethernet-phy@7 { + compatible = "ethernet-phy-id0022.1640", + "ethernet-phy-ieee802.3-c22"; + reg = <7>; + interrupts-extended = <&icu 3 IRQ_TYPE_LEVEL_LOW>; + rxc-skew-psec = <1400>; + txc-skew-psec = <1400>; + rxdv-skew-psec = <0>; + txdv-skew-psec = <0>; + rxd0-skew-psec = <0>; + rxd1-skew-psec = <0>; + rxd2-skew-psec = <0>; + rxd3-skew-psec = <0>; + txd0-skew-psec = <0>; + txd1-skew-psec = <0>; + txd2-skew-psec = <0>; + txd3-skew-psec = <0>; + }; +}; + +&mdio1 { + phy1: ethernet-phy@7 { + compatible = "ethernet-phy-id0022.1640", + "ethernet-phy-ieee802.3-c22"; + reg = <7>; + interrupts-extended = <&icu 16 IRQ_TYPE_LEVEL_LOW>; + rxc-skew-psec = <1400>; + txc-skew-psec = <1400>; + rxdv-skew-psec = <0>; + txdv-skew-psec = <0>; + rxd0-skew-psec = <0>; + rxd1-skew-psec = <0>; + rxd2-skew-psec = <0>; + rxd3-skew-psec = <0>; + txd0-skew-psec = <0>; + txd1-skew-psec = <0>; + txd2-skew-psec = <0>; + txd3-skew-psec = <0>; + }; +}; + &pinctrl { + eth0_pins: eth0 { + clk { + pinmux = <RZG3E_PORT_PINMUX(B, 1, 1)>; /* TXC */ + output-enable; + }; + + ctrl { + pinmux = <RZG3E_PORT_PINMUX(A, 1, 1)>, /* MDC */ + <RZG3E_PORT_PINMUX(A, 0, 1)>, /* MDIO */ + <RZG3E_PORT_PINMUX(C, 2, 15)>, /* PHY_INTR (IRQ2) */ + <RZG3E_PORT_PINMUX(C, 1, 1)>, /* RXD3 */ + <RZG3E_PORT_PINMUX(C, 0, 1)>, /* RXD2 */ + <RZG3E_PORT_PINMUX(B, 7, 1)>, /* RXD1 */ + <RZG3E_PORT_PINMUX(B, 6, 1)>, /* RXD0 */ + <RZG3E_PORT_PINMUX(B, 0, 1)>, /* RXC */ + <RZG3E_PORT_PINMUX(A, 2, 1)>, /* RX_CTL */ + <RZG3E_PORT_PINMUX(B, 5, 1)>, /* TXD3 */ + <RZG3E_PORT_PINMUX(B, 4, 1)>, /* TXD2 */ + <RZG3E_PORT_PINMUX(B, 3, 1)>, /* TXD1 */ + <RZG3E_PORT_PINMUX(B, 2, 1)>, /* TXD0 */ + <RZG3E_PORT_PINMUX(A, 3, 1)>; /* TX_CTL */ + }; + }; + + eth1_pins: eth1 { + clk { + pinmux = <RZG3E_PORT_PINMUX(E, 1, 1)>; /* TXC */ + output-enable; + }; + + ctrl { + + pinmux = <RZG3E_PORT_PINMUX(D, 1, 1)>, /* MDC */ + <RZG3E_PORT_PINMUX(D, 0, 1)>, /* MDIO */ + <RZG3E_PORT_PINMUX(F, 2, 15)>, /* PHY_INTR (IRQ15) */ + <RZG3E_PORT_PINMUX(F, 1, 1)>, /* RXD3 */ + <RZG3E_PORT_PINMUX(F, 0, 1)>, /* RXD2 */ + <RZG3E_PORT_PINMUX(E, 7, 1)>, /* RXD1 */ + <RZG3E_PORT_PINMUX(E, 6, 1)>, /* RXD0 */ + <RZG3E_PORT_PINMUX(E, 0, 1)>, /* RXC */ + <RZG3E_PORT_PINMUX(D, 2, 1)>, /* RX_CTL */ + <RZG3E_PORT_PINMUX(E, 5, 1)>, /* TXD3 */ + <RZG3E_PORT_PINMUX(E, 4, 1)>, /* TXD2 */ + <RZG3E_PORT_PINMUX(E, 3, 1)>, /* TXD1 */ + <RZG3E_PORT_PINMUX(E, 2, 1)>, /* TXD0 */ + <RZG3E_PORT_PINMUX(D, 3, 1)>; /* TX_CTL */ + }; + }; + i2c2_pins: i2c { pinmux = <RZG3E_PORT_PINMUX(3, 4, 1)>, /* SCL2 */ <RZG3E_PORT_PINMUX(3, 5, 1)>; /* SDA2 */ @@ -182,6 +293,15 @@ pinmux = <RZG3E_PORT_PINMUX(K, 2, 1)>; /* SD2PWEN */ }; }; + + xspi_pins: xspi0 { + pinmux = <RZG3E_PORT_PINMUX(M, 0, 0)>, /* XSPI0_IO0 */ + <RZG3E_PORT_PINMUX(M, 1, 0)>, /* XSPI0_IO1 */ + <RZG3E_PORT_PINMUX(M, 2, 0)>, /* XSPI0_IO2 */ + <RZG3E_PORT_PINMUX(M, 3, 0)>, /* XSPI0_IO3 */ + <RZG3E_PORT_PINMUX(L, 0, 0)>, /* XSPI0_CKP */ + <RZG3E_PORT_PINMUX(L, 1, 0)>; /* XSPI0_CS0 */ + }; }; &qextal_clk { @@ -245,3 +365,40 @@ &wdt1 { status = "okay"; }; + +&xspi { + pinctrl-0 = <&xspi_pins>; + pinctrl-names = "default"; + status = "okay"; + + flash@0 { + compatible = "jedec,spi-nor"; + reg = <0>; + vcc-supply = <®_1p8v>; + m25p,fast-read; + spi-max-frequency = <50000000>; + spi-tx-bus-width = <4>; + spi-rx-bus-width = <4>; + + partitions { + compatible = "fixed-partitions"; + #address-cells = <1>; + #size-cells = <1>; + + partition@0 { + label = "bl2"; + reg = <0x00000000 0x00060000>; + }; + + partition@60000 { + label = "fip"; + reg = <0x00060000 0x007a0000>; + }; + + partition@800000 { + label = "user"; + reg = <0x800000 0x800000>; + }; + }; + }; +}; |