diff options
Diffstat (limited to 'arch/arm64/boot/dts/ti/k3-j784s4-j742s2-main-common.dtsi')
| -rw-r--r-- | arch/arm64/boot/dts/ti/k3-j784s4-j742s2-main-common.dtsi | 35 |
1 files changed, 28 insertions, 7 deletions
diff --git a/arch/arm64/boot/dts/ti/k3-j784s4-j742s2-main-common.dtsi b/arch/arm64/boot/dts/ti/k3-j784s4-j742s2-main-common.dtsi index 1944616ab357..7c5b0c69897d 100644 --- a/arch/arm64/boot/dts/ti/k3-j784s4-j742s2-main-common.dtsi +++ b/arch/arm64/boot/dts/ti/k3-j784s4-j742s2-main-common.dtsi @@ -77,7 +77,7 @@ serdes_ln_ctrl: mux-controller@4080 { compatible = "reg-mux"; - reg = <0x00004080 0x30>; + reg = <0x00004080 0x50>; #mux-control-cells = <1>; mux-reg-masks = <0x0 0x3>, <0x4 0x3>, /* SERDES0 lane0/1 select */ <0x8 0x3>, <0xc 0x3>, /* SERDES0 lane2/3 select */ @@ -126,6 +126,16 @@ assigned-clock-parents = <&k3_clks 157 63>; #clock-cells = <0>; }; + + acspcie0_proxy_ctrl: clock-controller@1a090 { + compatible = "ti,j784s4-acspcie-proxy-ctrl", "syscon"; + reg = <0x1a090 0x4>; + }; + + acspcie1_proxy_ctrl: clock-controller@1a094 { + compatible = "ti,j784s4-acspcie-proxy-ctrl", "syscon"; + reg = <0x1a094 0x4>; + }; }; main_ehrpwm0: pwm@3000000 { @@ -1055,7 +1065,7 @@ reg = <0x00 0x02900000 0x00 0x1000>, <0x00 0x02907000 0x00 0x400>, <0x00 0x0d000000 0x00 0x00800000>, - <0x00 0x10000000 0x00 0x00001000>; + <0x40 0x00000000 0x00 0x00001000>; /* ECAM (4 KB) */ reg-names = "intd_cfg", "user_cfg", "reg", "cfg"; interrupt-names = "link_state"; interrupts = <GIC_SPI 318 IRQ_TYPE_EDGE_RISING>; @@ -1073,8 +1083,8 @@ device-id = <0xb012>; msi-map = <0x0 &gic_its 0x0 0x10000>; dma-coherent; - ranges = <0x01000000 0x0 0x10001000 0x0 0x10001000 0x0 0x0010000>, - <0x02000000 0x0 0x10011000 0x0 0x10011000 0x0 0x7fef000>; + ranges = <0x01000000 0x00 0x00001000 0x40 0x00001000 0x00 0x00100000>, /* IO (1 MB) */ + <0x02000000 0x00 0x00101000 0x40 0x00101000 0x00 0xffeff000>; /* 32-bit Non-Prefetchable MEM (4 GB - 1 MB - 4 KB) */ dma-ranges = <0x02000000 0x0 0x0 0x0 0x0 0x10000 0x0>; status = "disabled"; }; @@ -1084,7 +1094,7 @@ reg = <0x00 0x02910000 0x00 0x1000>, <0x00 0x02917000 0x00 0x400>, <0x00 0x0d800000 0x00 0x00800000>, - <0x00 0x18000000 0x00 0x00001000>; + <0x41 0x00000000 0x00 0x00001000>; /* ECAM (4 KB) */ reg-names = "intd_cfg", "user_cfg", "reg", "cfg"; interrupt-names = "link_state"; interrupts = <GIC_SPI 330 IRQ_TYPE_EDGE_RISING>; @@ -1102,8 +1112,8 @@ device-id = <0xb012>; msi-map = <0x0 &gic_its 0x10000 0x10000>; dma-coherent; - ranges = <0x01000000 0x0 0x18001000 0x00 0x18001000 0x0 0x0010000>, - <0x02000000 0x0 0x18011000 0x00 0x18011000 0x0 0x7fef000>; + ranges = <0x01000000 0x00 0x00001000 0x41 0x00001000 0x00 0x00100000>, /* IO (1 MB) */ + <0x02000000 0x00 0x00101000 0x41 0x00101000 0x00 0xffeff000>; /* 32-bit Non-Prefetchable MEM (4 GB - 1 MB - 4 KB) */ dma-ranges = <0x02000000 0x0 0x0 0x0 0x0 0x10000 0x0>; status = "disabled"; }; @@ -2670,4 +2680,15 @@ power-domains = <&k3_pds 269 TI_SCI_PD_EXCLUSIVE>; status = "disabled"; }; + + bist_main14: bist@33c0000 { + compatible = "ti,j784s4-bist"; + reg = <0x00 0x033c0000 0x00 0x400>, + <0x00 0x0010c1a0 0x00 0x01c>; + reg-names = "cfg", "ctrl_mmr"; + clocks = <&k3_clks 237 7>; + power-domains = <&k3_pds 237 TI_SCI_PD_EXCLUSIVE>; + bootph-pre-ram; + ti,sci-dev-id = <234>; + }; }; |