diff options
Diffstat (limited to 'drivers/ata/libata-core.c')
| -rw-r--r-- | drivers/ata/libata-core.c | 100 | 
1 files changed, 56 insertions, 44 deletions
| diff --git a/drivers/ata/libata-core.c b/drivers/ata/libata-core.c index 175df54eb664..88c242856dae 100644 --- a/drivers/ata/libata-core.c +++ b/drivers/ata/libata-core.c @@ -3029,33 +3029,33 @@ int sata_set_spd(struct ata_link *link)   */  static const struct ata_timing ata_timing[] = { -/*	{ XFER_PIO_SLOW, 120, 290, 240, 960, 290, 240, 960,   0 }, */ -	{ XFER_PIO_0,     70, 290, 240, 600, 165, 150, 600,   0 }, -	{ XFER_PIO_1,     50, 290,  93, 383, 125, 100, 383,   0 }, -	{ XFER_PIO_2,     30, 290,  40, 330, 100,  90, 240,   0 }, -	{ XFER_PIO_3,     30,  80,  70, 180,  80,  70, 180,   0 }, -	{ XFER_PIO_4,     25,  70,  25, 120,  70,  25, 120,   0 }, -	{ XFER_PIO_5,     15,  65,  25, 100,  65,  25, 100,   0 }, -	{ XFER_PIO_6,     10,  55,  20,  80,  55,  20,  80,   0 }, - -	{ XFER_SW_DMA_0, 120,   0,   0,   0, 480, 480, 960,   0 }, -	{ XFER_SW_DMA_1,  90,   0,   0,   0, 240, 240, 480,   0 }, -	{ XFER_SW_DMA_2,  60,   0,   0,   0, 120, 120, 240,   0 }, - -	{ XFER_MW_DMA_0,  60,   0,   0,   0, 215, 215, 480,   0 }, -	{ XFER_MW_DMA_1,  45,   0,   0,   0,  80,  50, 150,   0 }, -	{ XFER_MW_DMA_2,  25,   0,   0,   0,  70,  25, 120,   0 }, -	{ XFER_MW_DMA_3,  25,   0,   0,   0,  65,  25, 100,   0 }, -	{ XFER_MW_DMA_4,  25,   0,   0,   0,  55,  20,  80,   0 }, - -/*	{ XFER_UDMA_SLOW,  0,   0,   0,   0,   0,   0,   0, 150 }, */ -	{ XFER_UDMA_0,     0,   0,   0,   0,   0,   0,   0, 120 }, -	{ XFER_UDMA_1,     0,   0,   0,   0,   0,   0,   0,  80 }, -	{ XFER_UDMA_2,     0,   0,   0,   0,   0,   0,   0,  60 }, -	{ XFER_UDMA_3,     0,   0,   0,   0,   0,   0,   0,  45 }, -	{ XFER_UDMA_4,     0,   0,   0,   0,   0,   0,   0,  30 }, -	{ XFER_UDMA_5,     0,   0,   0,   0,   0,   0,   0,  20 }, -	{ XFER_UDMA_6,     0,   0,   0,   0,   0,   0,   0,  15 }, +/*	{ XFER_PIO_SLOW, 120, 290, 240, 960, 290, 240, 0,  960,   0 }, */ +	{ XFER_PIO_0,     70, 290, 240, 600, 165, 150, 0,  600,   0 }, +	{ XFER_PIO_1,     50, 290,  93, 383, 125, 100, 0,  383,   0 }, +	{ XFER_PIO_2,     30, 290,  40, 330, 100,  90, 0,  240,   0 }, +	{ XFER_PIO_3,     30,  80,  70, 180,  80,  70, 0,  180,   0 }, +	{ XFER_PIO_4,     25,  70,  25, 120,  70,  25, 0,  120,   0 }, +	{ XFER_PIO_5,     15,  65,  25, 100,  65,  25, 0,  100,   0 }, +	{ XFER_PIO_6,     10,  55,  20,  80,  55,  20, 0,   80,   0 }, + +	{ XFER_SW_DMA_0, 120,   0,   0,   0, 480, 480, 50, 960,   0 }, +	{ XFER_SW_DMA_1,  90,   0,   0,   0, 240, 240, 30, 480,   0 }, +	{ XFER_SW_DMA_2,  60,   0,   0,   0, 120, 120, 20, 240,   0 }, + +	{ XFER_MW_DMA_0,  60,   0,   0,   0, 215, 215, 20, 480,   0 }, +	{ XFER_MW_DMA_1,  45,   0,   0,   0,  80,  50, 5,  150,   0 }, +	{ XFER_MW_DMA_2,  25,   0,   0,   0,  70,  25, 5,  120,   0 }, +	{ XFER_MW_DMA_3,  25,   0,   0,   0,  65,  25, 5,  100,   0 }, +	{ XFER_MW_DMA_4,  25,   0,   0,   0,  55,  20, 5,   80,   0 }, + +/*	{ XFER_UDMA_SLOW,  0,   0,   0,   0,   0,   0, 0,    0, 150 }, */ +	{ XFER_UDMA_0,     0,   0,   0,   0,   0,   0, 0,    0, 120 }, +	{ XFER_UDMA_1,     0,   0,   0,   0,   0,   0, 0,    0,  80 }, +	{ XFER_UDMA_2,     0,   0,   0,   0,   0,   0, 0,    0,  60 }, +	{ XFER_UDMA_3,     0,   0,   0,   0,   0,   0, 0,    0,  45 }, +	{ XFER_UDMA_4,     0,   0,   0,   0,   0,   0, 0,    0,  30 }, +	{ XFER_UDMA_5,     0,   0,   0,   0,   0,   0, 0,    0,  20 }, +	{ XFER_UDMA_6,     0,   0,   0,   0,   0,   0, 0,    0,  15 },  	{ 0xFF }  }; @@ -3065,14 +3065,15 @@ static const struct ata_timing ata_timing[] = {  static void ata_timing_quantize(const struct ata_timing *t, struct ata_timing *q, int T, int UT)  { -	q->setup   = EZ(t->setup   * 1000,  T); -	q->act8b   = EZ(t->act8b   * 1000,  T); -	q->rec8b   = EZ(t->rec8b   * 1000,  T); -	q->cyc8b   = EZ(t->cyc8b   * 1000,  T); -	q->active  = EZ(t->active  * 1000,  T); -	q->recover = EZ(t->recover * 1000,  T); -	q->cycle   = EZ(t->cycle   * 1000,  T); -	q->udma    = EZ(t->udma    * 1000, UT); +	q->setup	= EZ(t->setup      * 1000,  T); +	q->act8b	= EZ(t->act8b      * 1000,  T); +	q->rec8b	= EZ(t->rec8b      * 1000,  T); +	q->cyc8b	= EZ(t->cyc8b      * 1000,  T); +	q->active	= EZ(t->active     * 1000,  T); +	q->recover	= EZ(t->recover    * 1000,  T); +	q->dmack_hold	= EZ(t->dmack_hold * 1000,  T); +	q->cycle	= EZ(t->cycle      * 1000,  T); +	q->udma		= EZ(t->udma       * 1000, UT);  }  void ata_timing_merge(const struct ata_timing *a, const struct ata_timing *b, @@ -3084,6 +3085,7 @@ void ata_timing_merge(const struct ata_timing *a, const struct ata_timing *b,  	if (what & ATA_TIMING_CYC8B  ) m->cyc8b   = max(a->cyc8b,   b->cyc8b);  	if (what & ATA_TIMING_ACTIVE ) m->active  = max(a->active,  b->active);  	if (what & ATA_TIMING_RECOVER) m->recover = max(a->recover, b->recover); +	if (what & ATA_TIMING_DMACK_HOLD) m->dmack_hold = max(a->dmack_hold, b->dmack_hold);  	if (what & ATA_TIMING_CYCLE  ) m->cycle   = max(a->cycle,   b->cycle);  	if (what & ATA_TIMING_UDMA   ) m->udma    = max(a->udma,    b->udma);  } @@ -4556,7 +4558,7 @@ void ata_sg_clean(struct ata_queued_cmd *qc)  	struct scatterlist *sg = qc->sg;  	int dir = qc->dma_dir; -	WARN_ON(sg == NULL); +	WARN_ON_ONCE(sg == NULL);  	VPRINTK("unmapping %u sg elements\n", qc->n_elem); @@ -4776,7 +4778,7 @@ void ata_qc_free(struct ata_queued_cmd *qc)  	struct ata_port *ap = qc->ap;  	unsigned int tag; -	WARN_ON(qc == NULL);	/* ata_qc_from_tag _might_ return NULL */ +	WARN_ON_ONCE(qc == NULL); /* ata_qc_from_tag _might_ return NULL */  	qc->flags = 0;  	tag = qc->tag; @@ -4791,8 +4793,8 @@ void __ata_qc_complete(struct ata_queued_cmd *qc)  	struct ata_port *ap = qc->ap;  	struct ata_link *link = qc->dev->link; -	WARN_ON(qc == NULL);	/* ata_qc_from_tag _might_ return NULL */ -	WARN_ON(!(qc->flags & ATA_QCFLAG_ACTIVE)); +	WARN_ON_ONCE(qc == NULL); /* ata_qc_from_tag _might_ return NULL */ +	WARN_ON_ONCE(!(qc->flags & ATA_QCFLAG_ACTIVE));  	if (likely(qc->flags & ATA_QCFLAG_DMAMAP))  		ata_sg_clean(qc); @@ -4878,7 +4880,7 @@ void ata_qc_complete(struct ata_queued_cmd *qc)  		struct ata_device *dev = qc->dev;  		struct ata_eh_info *ehi = &dev->link->eh_info; -		WARN_ON(ap->pflags & ATA_PFLAG_FROZEN); +		WARN_ON_ONCE(ap->pflags & ATA_PFLAG_FROZEN);  		if (unlikely(qc->err_mask))  			qc->flags |= ATA_QCFLAG_FAILED; @@ -5000,16 +5002,16 @@ void ata_qc_issue(struct ata_queued_cmd *qc)  	 * check is skipped for old EH because it reuses active qc to  	 * request ATAPI sense.  	 */ -	WARN_ON(ap->ops->error_handler && ata_tag_valid(link->active_tag)); +	WARN_ON_ONCE(ap->ops->error_handler && ata_tag_valid(link->active_tag));  	if (ata_is_ncq(prot)) { -		WARN_ON(link->sactive & (1 << qc->tag)); +		WARN_ON_ONCE(link->sactive & (1 << qc->tag));  		if (!link->sactive)  			ap->nr_active_links++;  		link->sactive |= 1 << qc->tag;  	} else { -		WARN_ON(link->sactive); +		WARN_ON_ONCE(link->sactive);  		ap->nr_active_links++;  		link->active_tag = qc->tag; @@ -5920,6 +5922,17 @@ static void async_port_probe(void *data, async_cookie_t cookie)  {  	int rc;  	struct ata_port *ap = data; + +	/* +	 * If we're not allowed to scan this host in parallel, +	 * we need to wait until all previous scans have completed +	 * before going further. +	 * Jeff Garzik says this is only within a controller, so we +	 * don't need to wait for port 0, only for later ports. +	 */ +	if (!(ap->host->flags & ATA_HOST_PARALLEL_SCAN) && ap->port_no != 0) +		async_synchronize_cookie(cookie); +  	/* probe */  	if (ap->ops->error_handler) {  		struct ata_eh_info *ehi = &ap->link.eh_info; @@ -6627,7 +6640,6 @@ EXPORT_SYMBOL_GPL(ata_dev_pair);  EXPORT_SYMBOL_GPL(ata_port_disable);  EXPORT_SYMBOL_GPL(ata_ratelimit);  EXPORT_SYMBOL_GPL(ata_wait_register); -EXPORT_SYMBOL_GPL(ata_scsi_ioctl);  EXPORT_SYMBOL_GPL(ata_scsi_queuecmd);  EXPORT_SYMBOL_GPL(ata_scsi_slave_config);  EXPORT_SYMBOL_GPL(ata_scsi_slave_destroy); | 
